sfr.h 21 KB

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  1. #ifndef _SFR_H
  2. #define _SFR_H
  3. #ifndef __ASSEMBLER__
  4. #define SFR_RO *(volatile unsigned long const *)
  5. #define SFR_WO *(volatile unsigned long*)
  6. #define SFR_RW *(volatile unsigned long*)
  7. #define SWINT() asm(".long 0xb0030057")
  8. #define EEBREAKINT() asm(".long 0xb0040057")
  9. #else
  10. #define SFR_RO
  11. #define SFR_WO
  12. #define SFR_RW
  13. #define SWINT .long 0xb0030057
  14. #define EEBREAKINT .long 0xb0040057
  15. #endif
  16. #define SFR_BASE 0x00000000
  17. #define SFR0_BASE (0x00000000 + 0x000)
  18. #define SFR1_BASE (0x00000000 + 0x100)
  19. #define SFR2_BASE (0x00000000 + 0x200)
  20. #define SFR3_BASE (0x00000000 + 0x300)
  21. #define SFR4_BASE (0x00000000 + 0x400)
  22. #define SFR5_BASE (0x00000000 + 0x500)
  23. #define SFR6_BASE (0x00000000 + 0x600)
  24. #define SFR7_BASE (0x00000000 + 0x700)
  25. #define SFR8_BASE (0x00000000 + 0x800)
  26. #define SFR9_BASE (0x00000000 + 0x900)
  27. #define SFR10_BASE (0x00000000 + 0xa00)
  28. #define SFR11_BASE (0x00000000 + 0xb00)
  29. #define SFR12_BASE (0x00000000 + 0xc00)
  30. #define SFR13_BASE (0x00000000 + 0xd00)
  31. #define SFR14_BASE (0x00000000 + 0xe00)
  32. #define SFR15_BASE (0x00000000 + 0xf00)
  33. //------------------------- SFR Group0 ---------------------------------------//
  34. #define TICK0CON SFR_RW (SFR0_BASE + 0x01*4)
  35. #define TICK0CPND SFR_RW (SFR0_BASE + 0x02*4)
  36. #define TICK0CNT SFR_RW (SFR0_BASE + 0x03*4)
  37. #define TICK0PR SFR_RW (SFR0_BASE + 0x04*4)
  38. #define TICK1CON SFR_RW (SFR0_BASE + 0x05*4)
  39. #define TICK1CPND SFR_RW (SFR0_BASE + 0x06*4)
  40. #define FUNCMCON0 SFR_RW (SFR0_BASE + 0x07*4)
  41. #define FUNCMCON1 SFR_RW (SFR0_BASE + 0x08*4)
  42. #define FUNCMCON2 SFR_RW (SFR0_BASE + 0x09*4)
  43. #define TICK1CNT SFR_RW (SFR0_BASE + 0x0a*4)
  44. #define TICK1PR SFR_RW (SFR0_BASE + 0x0b*4)
  45. #define UART0CON SFR_RW (SFR0_BASE + 0x10*4)
  46. #define UART0CPND SFR_WO (SFR0_BASE + 0x11*4)
  47. #define UART0BAUD SFR_RW (SFR0_BASE + 0x12*4)
  48. #define UART0DATA SFR_RW (SFR0_BASE + 0x13*4)
  49. #define TMR0CON SFR_RW (SFR0_BASE + 0x14*4)
  50. #define TMR0CPND SFR_RW (SFR0_BASE + 0x15*4)
  51. #define TMR0CNT SFR_RW (SFR0_BASE + 0x16*4)
  52. #define TMR0PR SFR_RW (SFR0_BASE + 0x17*4)
  53. #define CRSTPND SFR_RW (SFR0_BASE + 0x18*4)
  54. #define CLKCON0 SFR_RW (SFR0_BASE + 0x19*4)
  55. #define WDTCON SFR_RW (SFR0_BASE + 0x1a*4)
  56. #define RTCCON SFR_RW (SFR0_BASE + 0x1b*4)
  57. #define RTCDAT SFR_RW (SFR0_BASE + 0x1c*4)
  58. #define CLKCON1 SFR_RW (SFR0_BASE + 0x1d*4)
  59. #define RTCCPND SFR_WO (SFR0_BASE + 0x1e*4)
  60. #define SPI0CON SFR_RW (SFR0_BASE + 0x2a*4)
  61. #define SPI0BUF SFR_RW (SFR0_BASE + 0x2b*4)
  62. #define SPI0BAUD SFR_RW (SFR0_BASE + 0x2c*4)
  63. #define SPI0CPND SFR_RW (SFR0_BASE + 0x2d*4)
  64. #define SPI0DMACNT SFR_RW (SFR0_BASE + 0x2e*4)
  65. #define SPI0DMAADR SFR_RW (SFR0_BASE + 0x2f*4)
  66. #define UART1CON SFR_RW (SFR0_BASE + 0x30*4)
  67. #define UART1CPND SFR_WO (SFR0_BASE + 0x31*4)
  68. #define UART1BAUD SFR_RW (SFR0_BASE + 0x32*4)
  69. #define UART1DATA SFR_RW (SFR0_BASE + 0x33*4)
  70. #define TMR1CON SFR_RW (SFR0_BASE + 0x35*4)
  71. #define TMR1CPND SFR_RW (SFR0_BASE + 0x36*4)
  72. #define TMR1CNT SFR_RW (SFR0_BASE + 0x37*4)
  73. #define TMR1PR SFR_RW (SFR0_BASE + 0x38*4)
  74. #define TMR2CON SFR_RW (SFR0_BASE + 0x3a*4)
  75. #define TMR2CPND SFR_RW (SFR0_BASE + 0x3b*4)
  76. #define TMR2CNT SFR_RW (SFR0_BASE + 0x3c*4)
  77. #define TMR2PR SFR_RW (SFR0_BASE + 0x3d*4)
  78. #define CLKGAT2 SFR_RW (SFR0_BASE + 0x3e*4)
  79. #define DACDIGCON0 SFR_RW (SFR1_BASE + 0x10*4)
  80. #define DACVOLCON SFR_RW (SFR1_BASE + 0x11*4)
  81. #define CLKCON4 SFR_RW (SFR1_BASE + 0x1e*4)
  82. #define USBCON0 SFR_RW (SFR3_BASE + 0x00*4)
  83. #define USBCON1 SFR_RW (SFR3_BASE + 0x01*4)
  84. #define USBCON2 SFR_RW (SFR3_BASE + 0x02*4)
  85. #define USBCON3 SFR_RW (SFR3_BASE + 0x03*4)
  86. #define USBCON4 SFR_RW (SFR3_BASE + 0x04*4)
  87. #define PLL0CON1 SFR_RW (SFR3_BASE + 0x15*4)
  88. #define PWRCON0 SFR_RW (SFR3_BASE + 0x1d*4)
  89. #define LVDCON SFR_RW (SFR3_BASE + 0x1e*4)
  90. #define PWRCON1 SFR_RW (SFR3_BASE + 0x1f*4)
  91. #define PLL1CON1 SFR_RW (SFR3_BASE + 0x22*4)
  92. #define PLL0DIV SFR_RW (SFR3_BASE + 0x23*4)
  93. #define PLL1DIV SFR_RW (SFR3_BASE + 0x24*4)
  94. #define PLL2DIV SFR_RW (SFR3_BASE + 0x25*4)
  95. #define PLL0CON SFR_RW (SFR3_BASE + 0x26*4)
  96. #define PLL1CON SFR_RW (SFR3_BASE + 0x27*4)
  97. #define PLL2CON SFR_RW (SFR3_BASE + 0x28*4)
  98. #define XO26MCON SFR_RW (SFR3_BASE + 0x29*4)
  99. #define CLKCON2 SFR_RW (SFR3_BASE + 0x2a*4)
  100. #define RSTCON0 SFR_RW (SFR3_BASE + 0x2b*4)
  101. #define CLKGAT0 SFR_RW (SFR3_BASE + 0x2c*4)
  102. #define LPMCON SFR_RW (SFR3_BASE + 0x2d*4)
  103. #define MEMCON SFR_RW (SFR3_BASE + 0x2e*4)
  104. #define CLKCON3 SFR_RW (SFR3_BASE + 0x2f*4)
  105. #define PWRCON2 SFR_RW (SFR3_BASE + 0x38*4)
  106. #define CLKGAT1 SFR_RW (SFR3_BASE + 0x3f*4)
  107. #define HSUT0CON SFR_RW (SFR3_BASE + 0x30*4)
  108. #define HSUT0CPND SFR_RW (SFR3_BASE + 0x31*4)
  109. #define HSUT0BAUD SFR_RW (SFR3_BASE + 0x32*4)
  110. #define HSUT0DATA SFR_RW (SFR3_BASE + 0x33*4)
  111. #define HSUT0TXCNT SFR_RW (SFR3_BASE + 0x34*4)
  112. #define HSUT0TXADR SFR_RW (SFR3_BASE + 0x35*4)
  113. #define HSUT0RXCNT SFR_RW (SFR3_BASE + 0x36*4)
  114. #define HSUT0RXADR SFR_RW (SFR3_BASE + 0x39*4)
  115. #define HSUT0FIFOCNT SFR_RW (SFR3_BASE + 0x3a*4)
  116. #define HSUT0FIFO SFR_RW (SFR3_BASE + 0x3b*4)
  117. #define HSUT0FIFOADR SFR_RW (SFR3_BASE + 0x3c*4)
  118. #define HSUT0TMRCNT SFR_RW (SFR3_BASE + 0x3d*4)
  119. #define PICCONCLR SFR_WO (SFR4_BASE + 0x0c*4)
  120. #define PICCONSET SFR_WO (SFR4_BASE + 0x0d*4)
  121. #define PICENCLR SFR_WO (SFR4_BASE + 0x0e*4)
  122. #define PICENSET SFR_WO (SFR4_BASE + 0x0f*4)
  123. #define PICCON SFR_RW (SFR4_BASE + 0x10*4)
  124. #define PICEN SFR_RW (SFR4_BASE + 0x11*4)
  125. #define PICPR SFR_RW (SFR4_BASE + 0x12*4)
  126. #define PICADR SFR_RW (SFR4_BASE + 0x13*4)
  127. #define PICPND SFR_RW (SFR4_BASE + 0x14*4)
  128. #define FMRXDGTCON0 SFR_RW (SFR5_BASE + 0x07*4)
  129. #define FMRXANGCON0 SFR_RW (SFR5_BASE + 0x18*4)
  130. #define PLL2CON1 SFR_RW (SFR3_BASE + 0x0d*4)
  131. #define SADCDAT0 SFR_RO (SFR5_BASE + 0x20*4)
  132. #define SADCDAT1 SFR_RO (SFR5_BASE + 0x21*4)
  133. #define SADCDAT2 SFR_RO (SFR5_BASE + 0x22*4)
  134. #define SADCDAT3 SFR_RO (SFR5_BASE + 0x23*4)
  135. #define SADCDAT4 SFR_RO (SFR5_BASE + 0x24*4)
  136. #define SADCDAT5 SFR_RO (SFR5_BASE + 0x25*4)
  137. #define SADCDAT6 SFR_RO (SFR5_BASE + 0x26*4)
  138. #define SADCDAT7 SFR_RO (SFR5_BASE + 0x27*4)
  139. #define SADCDAT8 SFR_RO (SFR5_BASE + 0x28*4)
  140. #define SADCDAT9 SFR_RO (SFR5_BASE + 0x29*4)
  141. #define SADCDAT10 SFR_RO (SFR5_BASE + 0x2a*4)
  142. #define SADCDAT11 SFR_RO (SFR5_BASE + 0x2b*4)
  143. #define SADCDAT12 SFR_RO (SFR5_BASE + 0x2c*4)
  144. #define SADCDAT13 SFR_RO (SFR5_BASE + 0x2d*4)
  145. #define SADCDAT14 SFR_RO (SFR5_BASE + 0x2e*4)
  146. #define SADCDAT15 SFR_RO (SFR5_BASE + 0x2f*4)
  147. #define WKUPCON SFR_WO (SFR5_BASE + 0x39*4)
  148. #define WKUPEDG SFR_WO (SFR5_BASE + 0x3a*4)
  149. #define WKUPCPND SFR_WO (SFR5_BASE + 0x3b*4)
  150. //------------------------- SFR Group1 ---------------------------------------//
  151. #define AUBUFDATA SFR_RW (SFR1_BASE + 0x01*4)
  152. #define AUBUFCON SFR_RW (SFR1_BASE + 0x02*4)
  153. #define AUBUFSTARTADDR SFR_RW (SFR1_BASE + 0x03*4)
  154. #define AUBUFSIZE SFR_RW (SFR1_BASE + 0x04*4)
  155. #define AUBUFFIFOCNT SFR_RW (SFR1_BASE + 0x05*4)
  156. #define AUBUF1DATA SFR_RW (SFR1_BASE + 0x06*4)
  157. #define AUBUF1CON SFR_RW (SFR1_BASE + 0x07*4)
  158. #define AUBUF1STARTADDR SFR_RW (SFR1_BASE + 0x08*4)
  159. #define AUBUF1SIZE SFR_RW (SFR1_BASE + 0x09*4)
  160. #define AUBUF1FIFOCNT SFR_RW (SFR1_BASE + 0x0a*4)
  161. #define AUBUFPEAKLEFT SFR_RW (SFR1_BASE + 0x0b*4)
  162. #define AUBUFPEAKRIGHT SFR_RW (SFR1_BASE + 0x0c*4)
  163. #define DACDIGCON0 SFR_RW (SFR1_BASE + 0x10*4)
  164. #define DACVOLCON SFR_RW (SFR1_BASE + 0x11*4)
  165. #define AU0LMIXCOEF SFR_RW (SFR1_BASE + 0x12*4)
  166. #define AU0RMIXCOEF SFR_RW (SFR1_BASE + 0x13*4)
  167. #define AU1LMIXCOEF SFR_RW (SFR1_BASE + 0x14*4)
  168. #define AU1RMIXCOEF SFR_RW (SFR1_BASE + 0x15*4)
  169. #define DACRMDCCON SFR_RW (SFR1_BASE + 0x16*4)
  170. #define DACDCEXP SFR_RW (SFR1_BASE + 0x17*4)
  171. #define PHASECOMP SFR_RW (SFR1_BASE + 0x18*4)
  172. #define SRC0VOLCON SFR_RW (SFR1_BASE + 0x19*4)
  173. #define SRC1VOLCON SFR_RW (SFR1_BASE + 0x1a*4)
  174. #define SDDACBFCON SFR_RW (SFR1_BASE + 0x1b*4)
  175. #define SDDACBFKICK SFR_RW (SFR1_BASE + 0x1c*4)
  176. #define SDDACBFCOEF SFR_RW (SFR1_BASE + 0x1d*4)
  177. #define CLKCON4 SFR_RW (SFR1_BASE + 0x1e*4)
  178. #define SPFCON1 SFR_RW (SFR1_BASE + 0x1f*4)
  179. #define AUCON0 SFR_RW (SFR1_BASE + 0x20*4)
  180. #define AUCON1 SFR_RW (SFR1_BASE + 0x21*4)
  181. #define AUCON2 SFR_RW (SFR1_BASE + 0x22*4)
  182. #define AUCON3 SFR_RW (SFR1_BASE + 0x23*4)
  183. #define AUDMAADR SFR_RW (SFR1_BASE + 0x24*4)
  184. #define SPFCON0 SFR_RW (SFR1_BASE + 0x25*4)
  185. #define SPFDAT SFR_RW (SFR1_BASE + 0x26*4)
  186. #define SPFDMAADR SFR_RW (SFR1_BASE + 0x27*4)
  187. #define SPFPND SFR_RW (SFR1_BASE + 0x28*4)
  188. #define SPFCPND SFR_RW (SFR1_BASE + 0x29*4)
  189. #define SPFRATE SFR_RW (SFR1_BASE + 0x2a*4)
  190. #define AUANGCON6 SFR_RW (SFR1_BASE + 0x2c*4)
  191. #define AUANGCON4 SFR_RW (SFR1_BASE + 0x2d*4)
  192. #define AUANGCON5 SFR_RW (SFR1_BASE + 0x2e*4)
  193. #define SDADCGETDCCON SFR_RW (SFR1_BASE + 0x2f*4)
  194. #define SDADCDMACON SFR_RW (SFR1_BASE + 0x30*4)
  195. #define SDADCDMACLR SFR_RW (SFR1_BASE + 0x31*4)
  196. #define SDADCDMAFLAG SFR_RW (SFR1_BASE + 0x32*4)
  197. #define SDADCLDMAADDR SFR_RW (SFR1_BASE + 0x33*4)
  198. #define SDADCLDMASIZE SFR_RW (SFR1_BASE + 0x34*4)
  199. #define SDADCRDMAADDR SFR_RW (SFR1_BASE + 0x35*4)
  200. #define SDADCRDMASIZE SFR_RW (SFR1_BASE + 0x36*4)
  201. #define SDADCDIGCON SFR_RW (SFR1_BASE + 0x37*4)
  202. #define SDADCGAINCON SFR_RW (SFR1_BASE + 0x38*4)
  203. #define SDADCBFCON SFR_RW (SFR1_BASE + 0x39*4)
  204. #define SDADCBFKICK SFR_RW (SFR1_BASE + 0x3a*4)
  205. #define SDADCBFCOEF SFR_RW (SFR1_BASE + 0x3b*4)
  206. #define AUANGCON0 SFR_RW (SFR1_BASE + 0x3c*4)
  207. #define AUANGCON1 SFR_RW (SFR1_BASE + 0x3d*4)
  208. #define AUANGCON2 SFR_RW (SFR1_BASE + 0x3e*4)
  209. #define AUANGCON3 SFR_RW (SFR1_BASE + 0x3f*4)
  210. //------------------------- SFR Group5 ---------------------------------------//
  211. #define IISCON0 SFR_RW (SFR5_BASE + 0x00*4)
  212. #define IISBAUD SFR_RW (SFR5_BASE + 0x01*4)
  213. #define IISDMACNT SFR_RW (SFR5_BASE + 0x02*4)
  214. #define IISDMAOADR0 SFR_RW (SFR5_BASE + 0x03*4)
  215. #define IISDMAOADR1 SFR_RW (SFR5_BASE + 0x04*4)
  216. #define IISDMAIADR0 SFR_RW (SFR5_BASE + 0x05*4)
  217. #define IISDMAIADR1 SFR_RW (SFR5_BASE + 0x06*4)
  218. #define FMRXDGTCON0 SFR_RW (SFR5_BASE + 0x07*4)
  219. #define FMRXKICK SFR_RW (SFR5_BASE + 0x08*4)
  220. #define FMRXFLAG SFR_RW (SFR5_BASE + 0x09*4)
  221. #define FMRXDCSUM SFR_RW (SFR5_BASE + 0x0a*4)
  222. #define FMRXRSSISUM SFR_RW (SFR5_BASE + 0x0b*4)
  223. #define FMRXRSSIPOW SFR_RW (SFR5_BASE + 0x0c*4)
  224. #define FMRXPILOTPOW SFR_RW (SFR5_BASE + 0x0d*4)
  225. #define FMRXBALANVOL SFR_RW (SFR5_BASE + 0x0e*4)
  226. #define FMRXZEROCROSSCON SFR_RW (SFR5_BASE + 0x0f*4)
  227. #define GPDMACON SFR_RW (SFR5_BASE + 0x10*4)
  228. #define GPDMAADDRST0 SFR_RW (SFR5_BASE + 0x11*4)
  229. #define GPDMAADDRST1 SFR_RW (SFR5_BASE + 0x12*4)
  230. #define GPDMAKICK SFR_RW (SFR5_BASE + 0x13*4)
  231. #define FMRXDAMADDR SFR_RW (SFR5_BASE + 0x14*4)
  232. #define FMRXDMASIZE SFR_RW (SFR5_BASE + 0x15*4)
  233. #define FMRXDMACON SFR_RW (SFR5_BASE + 0x16*4)
  234. #define FMRXDMAFLAG SFR_RW (SFR5_BASE + 0x17*4)
  235. #define FMRXANGCON0 SFR_RW (SFR5_BASE + 0x18*4)
  236. #define FMRXANGCON1 SFR_RW (SFR5_BASE + 0x19*4)
  237. #define FMRXANGCON2 SFR_RW (SFR5_BASE + 0x1a*4)
  238. #define FMRXANGCON3 SFR_RW (SFR5_BASE + 0x1b*4)
  239. #define FMRXPLLDIGCON SFR_RW (SFR5_BASE + 0x1c*4)
  240. #define FMRXADCPLLDIV SFR_RW (SFR5_BASE + 0x1d*4)
  241. #define FMRXLOPLLDIV SFR_RW (SFR5_BASE + 0x1e*4)
  242. #define FMRXZEROCROSSCNT SFR_RW (SFR5_BASE + 0x1f*4)
  243. #define SADCDAT0 SFR_RO (SFR5_BASE + 0x20*4)
  244. #define SADCDAT1 SFR_RO (SFR5_BASE + 0x21*4)
  245. #define SADCDAT2 SFR_RO (SFR5_BASE + 0x22*4)
  246. #define SADCDAT3 SFR_RO (SFR5_BASE + 0x23*4)
  247. #define SADCDAT4 SFR_RO (SFR5_BASE + 0x24*4)
  248. #define SADCDAT5 SFR_RO (SFR5_BASE + 0x25*4)
  249. #define SADCDAT6 SFR_RO (SFR5_BASE + 0x26*4)
  250. #define SADCDAT7 SFR_RO (SFR5_BASE + 0x27*4)
  251. #define SADCDAT8 SFR_RO (SFR5_BASE + 0x28*4)
  252. #define SADCDAT9 SFR_RO (SFR5_BASE + 0x29*4)
  253. #define SADCDAT10 SFR_RO (SFR5_BASE + 0x2a*4)
  254. #define SADCDAT11 SFR_RO (SFR5_BASE + 0x2b*4)
  255. #define SADCDAT12 SFR_RO (SFR5_BASE + 0x2c*4)
  256. #define SADCDAT13 SFR_RO (SFR5_BASE + 0x2d*4)
  257. #define SADCDAT14 SFR_RO (SFR5_BASE + 0x2e*4)
  258. #define SADCDAT15 SFR_RO (SFR5_BASE + 0x2f*4)
  259. #define SADCCON SFR_RW (SFR5_BASE + 0x30*4)
  260. #define SADCCH SFR_RW (SFR5_BASE + 0x31*4)
  261. #define SADCST SFR_WO (SFR5_BASE + 0x32*4)
  262. #define SADCBAUD SFR_WO (SFR5_BASE + 0x33*4)
  263. #define MBISTCON SFR_WO (SFR5_BASE + 0x34*4)
  264. #define MBISTEADR SFR_WO (SFR5_BASE + 0x35*4)
  265. #define MBISTBADR SFR_WO (SFR5_BASE + 0x36*4)
  266. #define MBISTCRC SFR_WO (SFR5_BASE + 0x37*4)
  267. #define MBISTERR SFR_WO (SFR5_BASE + 0x38*4)
  268. #define WKUPCON SFR_WO (SFR5_BASE + 0x39*4)
  269. #define WKUPEDG SFR_WO (SFR5_BASE + 0x3a*4)
  270. #define WKUPCPND SFR_WO (SFR5_BASE + 0x3b*4)
  271. //#define FMRXLOAFCCON SFR_RW (SFR5_BASE + 0x3c*4)
  272. #define EFCON0 SFR_RW (SFR5_BASE + 0x3d*4)
  273. #define EFCON1 SFR_WO (SFR5_BASE + 0x3e*4)
  274. #define EFDAT SFR_RW (SFR5_BASE + 0x3f*4)
  275. //------------------------- SFR Group6 ---------------------------------------//
  276. #define GPIOASET SFR_RW (SFR6_BASE + 0x00*4)
  277. #define GPIOACLR SFR_RW (SFR6_BASE + 0x01*4)
  278. #define GPIOA SFR_RW (SFR6_BASE + 0x02*4)
  279. #define GPIOADIR SFR_RW (SFR6_BASE + 0x03*4)
  280. #define GPIOADE SFR_RW (SFR6_BASE + 0x04*4)
  281. #define GPIOAFEN SFR_RW (SFR6_BASE + 0x05*4)
  282. #define GPIOADRV SFR_RW (SFR6_BASE + 0x06*4)
  283. #define GPIOAPU SFR_RW (SFR6_BASE + 0x07*4)
  284. #define GPIOAPD SFR_RW (SFR6_BASE + 0x08*4)
  285. #define GPIOAPU200K SFR_RW (SFR6_BASE + 0x09*4)
  286. #define GPIOAPD200K SFR_RW (SFR6_BASE + 0x0a*4)
  287. #define GPIOAPU300 SFR_RW (SFR6_BASE + 0x0b*4)
  288. #define GPIOAPD300 SFR_RW (SFR6_BASE + 0x0c*4)
  289. #define GPIOAMFUNC SFR_RW (SFR6_BASE + 0x0f*4)
  290. #define GPIOBSET SFR_RW (SFR6_BASE + 0x10*4)
  291. #define GPIOBCLR SFR_RW (SFR6_BASE + 0x11*4)
  292. #define GPIOB SFR_RW (SFR6_BASE + 0x12*4)
  293. #define GPIOBDIR SFR_RW (SFR6_BASE + 0x13*4)
  294. #define GPIOBDE SFR_RW (SFR6_BASE + 0x14*4)
  295. #define GPIOBFEN SFR_RW (SFR6_BASE + 0x15*4)
  296. #define GPIOBDRV SFR_RW (SFR6_BASE + 0x16*4)
  297. #define GPIOBPU SFR_RW (SFR6_BASE + 0x17*4)
  298. #define GPIOBPD SFR_RW (SFR6_BASE + 0x18*4)
  299. #define GPIOBPU200K SFR_RW (SFR6_BASE + 0x19*4)
  300. #define GPIOBPD200K SFR_RW (SFR6_BASE + 0x1a*4)
  301. #define GPIOBPU300 SFR_RW (SFR6_BASE + 0x1b*4)
  302. #define GPIOBPD300 SFR_RW (SFR6_BASE + 0x1c*4)
  303. #define GPIOESET SFR_RW (SFR6_BASE + 0x20*4)
  304. #define GPIOECLR SFR_RW (SFR6_BASE + 0x21*4)
  305. #define GPIOE SFR_RW (SFR6_BASE + 0x22*4)
  306. #define GPIOEDIR SFR_RW (SFR6_BASE + 0x23*4)
  307. #define GPIOEDE SFR_RW (SFR6_BASE + 0x24*4)
  308. #define GPIOEFEN SFR_RW (SFR6_BASE + 0x25*4)
  309. #define GPIOEDRV SFR_RW (SFR6_BASE + 0x26*4)
  310. #define GPIOEPU SFR_RW (SFR6_BASE + 0x27*4)
  311. #define GPIOEPD SFR_RW (SFR6_BASE + 0x28*4)
  312. #define GPIOEPU200K SFR_RW (SFR6_BASE + 0x29*4)
  313. #define GPIOEPD200K SFR_RW (SFR6_BASE + 0x2a*4)
  314. #define GPIOEPU300 SFR_RW (SFR6_BASE + 0x2b*4)
  315. #define GPIOEPD300 SFR_RW (SFR6_BASE + 0x2c*4)
  316. #define GPIOFSET SFR_RW (SFR6_BASE + 0x30*4)
  317. #define GPIOFCLR SFR_RW (SFR6_BASE + 0x31*4)
  318. #define GPIOF SFR_RW (SFR6_BASE + 0x32*4)
  319. #define GPIOFDIR SFR_RW (SFR6_BASE + 0x33*4)
  320. #define GPIOFDE SFR_RW (SFR6_BASE + 0x34*4)
  321. #define GPIOFFEN SFR_RW (SFR6_BASE + 0x35*4)
  322. #define GPIOFDRV SFR_RW (SFR6_BASE + 0x36*4)
  323. #define GPIOFPU SFR_RW (SFR6_BASE + 0x37*4)
  324. #define GPIOFPD SFR_RW (SFR6_BASE + 0x38*4)
  325. #define GPIOFPU200K SFR_RW (SFR6_BASE + 0x39*4)
  326. #define GPIOFPD200K SFR_RW (SFR6_BASE + 0x3a*4)
  327. #define GPIOFPU300 SFR_RW (SFR6_BASE + 0x3b*4)
  328. #define GPIOFPD300 SFR_RW (SFR6_BASE + 0x3c*4)
  329. //------------------------- SFR Group7 ---------------------------------------//
  330. #define GPIOGSET SFR_RW (SFR7_BASE + 0x00*4)
  331. #define GPIOGCLR SFR_RW (SFR7_BASE + 0x01*4)
  332. #define GPIOG SFR_RW (SFR7_BASE + 0x02*4)
  333. #define GPIOGDIR SFR_RW (SFR7_BASE + 0x03*4)
  334. #define GPIOGDE SFR_RW (SFR7_BASE + 0x04*4)
  335. #define GPIOGFEN SFR_RW (SFR7_BASE + 0x05*4)
  336. #define GPIOGDRV SFR_RW (SFR7_BASE + 0x06*4)
  337. #define GPIOGPU SFR_RW (SFR7_BASE + 0x07*4)
  338. #define GPIOGPD SFR_RW (SFR7_BASE + 0x08*4)
  339. #define GPIOGPU200K SFR_RW (SFR7_BASE + 0x09*4)
  340. #define GPIOGPD200K SFR_RW (SFR7_BASE + 0x0a*4)
  341. #define GPIOGPU300 SFR_RW (SFR7_BASE + 0x0b*4)
  342. #define GPIOGPD300 SFR_RW (SFR7_BASE + 0x0c*4)
  343. #define IRRXCON SFR_RW (SFR8_BASE + 0x1b*4)
  344. #define IRRXDAT SFR_RW (SFR8_BASE + 0x1c*4)
  345. #define IRRXCPND SFR_WO (SFR8_BASE + 0x1d*4)
  346. #define IRRXERR0 SFR_WO (SFR8_BASE + 0x1e*4)
  347. #define IRRXERR1 SFR_WO (SFR8_BASE + 0x1f*4)
  348. #define USERKEY SFR_RW (SFR8_BASE + 0x20*4)
  349. #define PROTCON1 SFR_RW (SFR8_BASE + 0x21*4)
  350. //------------------------- SFR Group9 ---------------------------------------//
  351. #define TMR3CON SFR_RW (SFR9_BASE + 0x00*4)
  352. #define TMR3CPND SFR_WO (SFR9_BASE + 0x01*4)
  353. #define TMR3CNT SFR_RW (SFR9_BASE + 0x02*4)
  354. #define TMR3PR SFR_RW (SFR9_BASE + 0x03*4)
  355. #define TMR3CPT SFR_RO (SFR9_BASE + 0x04*4)
  356. #define TMR3DUTY0 SFR_WO (SFR9_BASE + 0x05*4)
  357. #define TMR3DUTY1 SFR_WO (SFR9_BASE + 0x06*4)
  358. #define TMR3DUTY2 SFR_WO (SFR9_BASE + 0x07*4)
  359. #define TMR4CON SFR_RW (SFR9_BASE + 0x08*4)
  360. #define TMR4CPND SFR_WO (SFR9_BASE + 0x09*4)
  361. #define TMR4CNT SFR_RW (SFR9_BASE + 0x0a*4)
  362. #define TMR4PR SFR_RW (SFR9_BASE + 0x0b*4)
  363. #define TMR4CPT SFR_RO (SFR9_BASE + 0x0c*4)
  364. #define TMR4DUTY0 SFR_WO (SFR9_BASE + 0x0d*4)
  365. #define TMR4DUTY1 SFR_WO (SFR9_BASE + 0x0e*4)
  366. #define TMR4DUTY2 SFR_WO (SFR9_BASE + 0x0f*4)
  367. #define TMR5CON SFR_RW (SFR9_BASE + 0x10*4)
  368. #define TMR5CPND SFR_WO (SFR9_BASE + 0x11*4)
  369. #define TMR5CNT SFR_RW (SFR9_BASE + 0x12*4)
  370. #define TMR5PR SFR_RW (SFR9_BASE + 0x13*4)
  371. #define TMR5CPT SFR_RO (SFR9_BASE + 0x14*4)
  372. #define TMR5DUTY0 SFR_WO (SFR9_BASE + 0x15*4)
  373. #define TMR5DUTY1 SFR_WO (SFR9_BASE + 0x16*4)
  374. #define TMR5DUTY2 SFR_WO (SFR9_BASE + 0x17*4)
  375. #define UART2CON SFR_RW (SFR9_BASE + 0x18*4)
  376. #define UART2CPND SFR_WO (SFR9_BASE + 0x19*4)
  377. #define UART2BAUD SFR_RW (SFR9_BASE + 0x1a*4)
  378. #define UART2DATA SFR_RW (SFR9_BASE + 0x1b*4)
  379. #define PORTINTEDG SFR_RW (SFR9_BASE + 0x1e*4)
  380. #define PORTINTEN SFR_RW (SFR9_BASE + 0x1f*4)
  381. #define SPI1CON SFR_RW (SFR9_BASE + 0x20*4)
  382. #define SPI1BUF SFR_RW (SFR9_BASE + 0x21*4)
  383. #define SPI1BAUD SFR_RW (SFR9_BASE + 0x22*4)
  384. #define SPI1CPND SFR_RW (SFR9_BASE + 0x23*4)
  385. #define SPI1DMACNT SFR_RW (SFR9_BASE + 0x24*4)
  386. #define SPI1DMAADR SFR_RW (SFR9_BASE + 0x25*4)
  387. #define RTCALM SFR_RW (SFR9_BASE + 0x2e*4)
  388. #define RTCCNT SFR_RW (SFR9_BASE + 0x2f*4)
  389. #define RTCCON0 SFR_RW (SFR9_BASE + 0x30*4)
  390. #define RTCCON1 SFR_RW (SFR9_BASE + 0x31*4)
  391. #define RTCCON2 SFR_RW (SFR9_BASE + 0x32*4)
  392. #define RTCCON3 SFR_RW (SFR9_BASE + 0x33*4)
  393. #define RTCCON4 SFR_RW (SFR9_BASE + 0x34*4)
  394. #define RTCCON5 SFR_RW (SFR9_BASE + 0x35*4)
  395. #define RTCCON6 SFR_RW (SFR9_BASE + 0x36*4)
  396. #define RTCCON7 SFR_RW (SFR9_BASE + 0x37*4)
  397. #define RTCCON8 SFR_RW (SFR9_BASE + 0x38*4)
  398. #define RTCCON9 SFR_RW (SFR9_BASE + 0x39*4)
  399. #define RTCCON10 SFR_RW (SFR9_BASE + 0x3a*4)
  400. #define RTCCON11 SFR_RW (SFR9_BASE + 0x3b*4)
  401. #define RTCCON12 SFR_RW (SFR9_BASE + 0x3c*4)
  402. #define RTCCON13 SFR_RW (SFR9_BASE + 0x3d*4)
  403. #define RTCCON14 SFR_RW (SFR9_BASE + 0x3e*4)
  404. #define RTCCON15 SFR_RW (SFR9_BASE + 0x3f*4)
  405. //------------------------- SFR Group10 --------------------------------------//
  406. #define TKIE SFR_RW (SFR10_BASE + 0x00*4)
  407. #define TKCPND SFR_RW (SFR10_BASE + 0x01*4)
  408. #define TKCON SFR_RW (SFR10_BASE + 0x02*4)
  409. #define TKACON SFR_RW (SFR10_BASE + 0x03*4)
  410. #define TKCNT SFR_RW (SFR10_BASE + 0x04*4)
  411. #define TKCDPR0 SFR_RW (SFR10_BASE + 0x05*4)
  412. #define TKCDPR1 SFR_RW (SFR10_BASE + 0x06*4)
  413. #define TKTMR SFR_RW (SFR10_BASE + 0x07*4)
  414. #define TKBCNT SFR_RW (SFR10_BASE + 0x09*4)
  415. #define TKPTHD SFR_RW (SFR10_BASE + 0x0a*4)
  416. #define TKETHD SFR_RW (SFR10_BASE + 0x0b*4)
  417. #define PIANOCON SFR_RW (SFR10_BASE + 0x10*4)
  418. #define PIANOBUF SFR_WO (SFR10_BASE + 0x11*4)
  419. #define TONEDLY SFR_RW (SFR10_BASE + 0x12*4)
  420. #define TONEDLY1 SFR_RW (SFR10_BASE + 0x13*4)
  421. //------------------------- others --------------------------------------//
  422. #define MEMCON1 SFR_RW (SFR10_BASE + 0x2e*4)
  423. #define MEMCON2 SFR_RW (SFR10_BASE + 0x2f*4)
  424. #endif