sfr.h 25 KB

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  1. #ifndef _SFR_
  2. #define _SFR_
  3. #ifndef __ASSEMBLER__
  4. #define SFR_RO *(volatile unsigned long const *)
  5. #define SFR_WO *(volatile unsigned long*)
  6. #define SFR_RW *(volatile unsigned long*)
  7. #define SWINT() asm(".long 0xb0030057")
  8. #define EEBREAKINT() asm(".long 0xb0040057")
  9. #else
  10. #define SFR_RO
  11. #define SFR_WO
  12. #define SFR_RW
  13. #define SWINT .long 0xb0030057
  14. #define EEBREAKINT .long 0xb0040057
  15. #endif
  16. #define SFR_BASE 0x00000100 // address 0~255 is reserved
  17. #define SFR0_BASE (SFR_BASE + 0x0000)
  18. #define SFR1_BASE (SFR_BASE + 0x0100)
  19. #define SFR2_BASE (SFR_BASE + 0x0200)
  20. #define SFR3_BASE (SFR_BASE + 0x0300)
  21. #define SFR4_BASE (SFR_BASE + 0x0400)
  22. #define SFR5_BASE (SFR_BASE + 0x0500)
  23. #define SFR6_BASE (SFR_BASE + 0x0600)
  24. #define SFR7_BASE (SFR_BASE + 0x0700)
  25. #define SFR8_BASE (SFR_BASE + 0x0800)
  26. #define SFR9_BASE (SFR_BASE + 0x0900)
  27. #define SFR10_BASE (SFR_BASE + 0x0a00)
  28. #define SFR11_BASE (SFR_BASE + 0x0b00)
  29. #define SFR12_BASE (SFR_BASE + 0x0c00)
  30. #define SFR13_BASE (SFR_BASE + 0x0d00)
  31. #define SFR14_BASE (SFR_BASE + 0x0e00)
  32. #define SFR15_BASE (SFR_BASE + 0x0f00)
  33. #define SFR16_BASE (SFR_BASE + 0x1000)
  34. #define SFR17_BASE (SFR_BASE + 0x1100)
  35. #define SFR30_BASE (SFR_BASE + 0x1e00)
  36. //------------------------- SFR Group0 ---------------------------------------//
  37. #define TMR0CON SFR_RW (SFR0_BASE + 0x00*4)
  38. #define TMR0CPND SFR_RW (SFR0_BASE + 0x01*4)
  39. #define TMR0CNT SFR_RW (SFR0_BASE + 0x02*4)
  40. #define TMR0PR SFR_RW (SFR0_BASE + 0x03*4)
  41. #define TMR1CON SFR_RW (SFR0_BASE + 0x04*4)
  42. #define TMR1CPND SFR_RW (SFR0_BASE + 0x05*4)
  43. #define TMR1CNT SFR_RW (SFR0_BASE + 0x06*4)
  44. #define TMR1PR SFR_RW (SFR0_BASE + 0x07*4)
  45. #define TMR2CON SFR_RW (SFR0_BASE + 0x08*4)
  46. #define TMR2CPND SFR_RW (SFR0_BASE + 0x09*4)
  47. #define TMR2CNT SFR_RW (SFR0_BASE + 0x0a*4)
  48. #define TMR2PR SFR_RW (SFR0_BASE + 0x0b*4)
  49. #define TMR3CON SFR_RW (SFR0_BASE + 0x0c*4)
  50. #define TMR3CPND SFR_RW (SFR0_BASE + 0x0d*4)
  51. #define TMR3CNT SFR_RW (SFR0_BASE + 0x0e*4)
  52. #define TMR3PR SFR_RW (SFR0_BASE + 0x0f*4)
  53. #define TMR3CPT SFR_RW (SFR0_BASE + 0x10*4)
  54. #define TMR3DUTY0 SFR_RW (SFR0_BASE + 0x11*4)
  55. #define TMR3DUTY1 SFR_RW (SFR0_BASE + 0x12*4)
  56. #define TMR3DUTY2 SFR_RW (SFR0_BASE + 0x13*4)
  57. #define TMR4CON SFR_RW (SFR0_BASE + 0x14*4)
  58. #define TMR4CPND SFR_RW (SFR0_BASE + 0x15*4)
  59. #define TMR4CNT SFR_RW (SFR0_BASE + 0x16*4)
  60. #define TMR4PR SFR_RW (SFR0_BASE + 0x17*4)
  61. #define TMR4CPT SFR_RW (SFR0_BASE + 0x18*4)
  62. #define TMR4DUTY0 SFR_RW (SFR0_BASE + 0x19*4)
  63. #define TMR4DUTY1 SFR_RW (SFR0_BASE + 0x1a*4)
  64. #define TMR4DUTY2 SFR_RW (SFR0_BASE + 0x1b*4)
  65. #define TMR5CON SFR_RW (SFR0_BASE + 0x1c*4)
  66. #define TMR5CPND SFR_RW (SFR0_BASE + 0x1d*4)
  67. #define TMR5CNT SFR_RW (SFR0_BASE + 0x1e*4)
  68. #define TMR5PR SFR_RW (SFR0_BASE + 0x1f*4)
  69. #define TMR5CPT SFR_RW (SFR0_BASE + 0x20*4)
  70. #define TMR5DUTY0 SFR_RW (SFR0_BASE + 0x21*4)
  71. #define TMR5DUTY1 SFR_RW (SFR0_BASE + 0x22*4)
  72. #define TMR5DUTY2 SFR_RW (SFR0_BASE + 0x23*4)
  73. #define TMR5DUTY3 SFR_RW (SFR0_BASE + 0x24*4)
  74. #define TMR5DUTY4 SFR_RW (SFR0_BASE + 0x25*4)
  75. #define TMR5DUTY5 SFR_RW (SFR0_BASE + 0x26*4)
  76. #define UART0CON SFR_RW (SFR0_BASE + 0x27*4)
  77. #define UART0CPND SFR_RW (SFR0_BASE + 0x28*4)
  78. #define UART0BAUD SFR_RW (SFR0_BASE + 0x29*4)
  79. #define UART0DATA SFR_RW (SFR0_BASE + 0x2a*4)
  80. #define UART1CON SFR_RW (SFR0_BASE + 0x2b*4)
  81. #define UART1CPND SFR_RW (SFR0_BASE + 0x2c*4)
  82. #define UART1BAUD SFR_RW (SFR0_BASE + 0x2d*4)
  83. #define UART1DATA SFR_RW (SFR0_BASE + 0x2e*4)
  84. #define UART2CON SFR_RW (SFR0_BASE + 0x2f*4)
  85. #define UART2CPND SFR_RW (SFR0_BASE + 0x30*4)
  86. #define UART2BAUD SFR_RW (SFR0_BASE + 0x31*4)
  87. #define UART2DATA SFR_RW (SFR0_BASE + 0x32*4)
  88. #define HSUT0CON SFR_RW (SFR0_BASE + 0x33*4)
  89. #define HSUT0CPND SFR_RW (SFR0_BASE + 0x34*4)
  90. #define HSUT0BAUD SFR_RW (SFR0_BASE + 0x35*4)
  91. #define HSUT0DATA SFR_RW (SFR0_BASE + 0x36*4)
  92. #define HSUT0TXCNT SFR_RW (SFR0_BASE + 0x37*4)
  93. #define HSUT0TXADR SFR_RW (SFR0_BASE + 0x38*4)
  94. #define HSUT0RXCNT SFR_RW (SFR0_BASE + 0x39*4)
  95. #define HSUT0RXADR SFR_RW (SFR0_BASE + 0x3a*4)
  96. #define HSUT0FIFOCNT SFR_RW (SFR0_BASE + 0x3b*4)
  97. #define HSUT0FIFO SFR_RW (SFR0_BASE + 0x3c*4)
  98. #define HSUT0FIFOADR SFR_RW (SFR0_BASE + 0x3d*4)
  99. #define HSUT0TMRCNT SFR_RW (SFR0_BASE + 0x3e*4)
  100. #define HSUT0FCCON SFR_RW (SFR0_BASE + 0x3f*4)
  101. //------------------------- SFR Group1 ---------------------------------------//
  102. #define WDTCON SFR_RW (SFR1_BASE + 0x00*4)
  103. #define RTCCON SFR_RW (SFR1_BASE + 0x01*4)
  104. #define RTCCPND SFR_RW (SFR1_BASE + 0x02*4)
  105. #define PWRCON0 SFR_RW (SFR1_BASE + 0x04*4)
  106. #define PWRCON1 SFR_RW (SFR1_BASE + 0x05*4)
  107. #define PWRCON2 SFR_RW (SFR1_BASE + 0x06*4)
  108. #define PWRCON3 SFR_RW (SFR1_BASE + 0x07*4)
  109. #define LPMCON SFR_RW (SFR1_BASE + 0x08*4)
  110. #define LVDCON SFR_RW (SFR1_BASE + 0x09*4)
  111. #define RSTCON0 SFR_RW (SFR1_BASE + 0x0a*4)
  112. #define CRSTPND SFR_RW (SFR1_BASE + 0x0b*4)
  113. //efine SFR_RW (SFR1_BASE + 0x0c*4)
  114. //efine SFR_RW (SFR1_BASE + 0x0d*4)
  115. //efine SFR_RW (SFR1_BASE + 0x0e*4)
  116. //efine SFR_RW (SFR1_BASE + 0x0f*4)
  117. //efine SFR_RW (SFR1_BASE + 0x10*4)
  118. //efine SFR_RW (SFR1_BASE + 0x11*4)
  119. //efine SFR_RW (SFR1_BASE + 0x12*4)
  120. #define XOSCCON SFR_RW (SFR1_BASE + 0x13*4)
  121. #define CLKCON0 SFR_RW (SFR1_BASE + 0x14*4)
  122. #define CLKCON1 SFR_RW (SFR1_BASE + 0x15*4)
  123. #define CLKCON2 SFR_RW (SFR1_BASE + 0x16*4)
  124. #define CLKCON3 SFR_RW (SFR1_BASE + 0x17*4)
  125. #define CLKCON4 SFR_RW (SFR1_BASE + 0x18*4)
  126. #define CLKCON5 SFR_RW (SFR1_BASE + 0x19*4)
  127. #define CLKGAT0 SFR_RW (SFR1_BASE + 0x1a*4)
  128. #define CLKGAT1 SFR_RW (SFR1_BASE + 0x1b*4)
  129. #define CLKGAT2 SFR_RW (SFR1_BASE + 0x1c*4)
  130. #define CLKGAT3 SFR_RW (SFR1_BASE + 0x1d*4)
  131. #define CLKGAT4 SFR_RW (SFR1_BASE + 0x1e*4)
  132. #define CLKGAT5 SFR_RW (SFR1_BASE + 0x1f*4)
  133. #define CLKDIVCON0 SFR_RW (SFR1_BASE + 0x20*4)
  134. #define CLKDIVCON1 SFR_RW (SFR1_BASE + 0x21*4)
  135. #define CLKDIVCON2 SFR_RW (SFR1_BASE + 0x22*4)
  136. #define CLKDIVCON3 SFR_RW (SFR1_BASE + 0x23*4)
  137. #define CLKDIVCON4 SFR_RW (SFR1_BASE + 0x24*4)
  138. #define CLKDIVCON5 SFR_RW (SFR1_BASE + 0x25*4)
  139. #define USERKEY SFR_RW (SFR1_BASE + 0x26*4)
  140. #define PROTCON1 SFR_RW (SFR1_BASE + 0x27*4)
  141. #define PRCLKCON0 SFR_RW (SFR1_BASE + 0x2d*4)
  142. #define PRCLKDIVCON0 SFR_RW (SFR1_BASE + 0x2e*4)
  143. #define PRCLKDIVCON1 SFR_RW (SFR1_BASE + 0x2f*4)
  144. #define PLL0CON0 SFR_RW (SFR1_BASE + 0x30*4)
  145. #define PLL0CON1 SFR_RW (SFR1_BASE + 0x31*4)
  146. #define PLL0DIV SFR_RW (SFR1_BASE + 0x32*4)
  147. #define VERSIONID SFR_RW (SFR1_BASE + 0x3f*4)
  148. //------------------------- SFR Group2 ---------------------------------------//
  149. #define BTCON2 SFR_RW (SFR2_BASE + 0x00*4)
  150. #define FUNCINCON SFR_RW (SFR2_BASE + 0x1d*4)
  151. #define FUNCOUTCON SFR_RW (SFR2_BASE + 0x1e*4)
  152. #define FUNCOUTMCON SFR_RW (SFR2_BASE + 0x1f*4)
  153. #define FUNCMCON0 SFR_RW (SFR2_BASE + 0x20*4)
  154. #define FUNCMCON1 SFR_RW (SFR2_BASE + 0x21*4)
  155. #define FUNCMCON2 SFR_RW (SFR2_BASE + 0x22*4)
  156. #define FUNCMCON3 SFR_RW (SFR2_BASE + 0x23*4)
  157. #define FUNCMCON4 SFR_RW (SFR2_BASE + 0x24*4)
  158. #define FUNCMCON5 SFR_RW (SFR2_BASE + 0x25*4)
  159. #define WKUPCON SFR_RW (SFR2_BASE + 0x26*4)
  160. #define WKUPEDG SFR_RW (SFR2_BASE + 0x27*4)
  161. #define WKUPIE SFR_RW (SFR2_BASE + 0x28*4)
  162. #define WKUPCPND SFR_RW (SFR2_BASE + 0x29*4)
  163. #define WKPINMAP SFR_RW (SFR2_BASE + 0x2a*4)
  164. #define PORTINTEDG SFR_RW (SFR2_BASE + 0x2b*4)
  165. #define PORTINTEN SFR_RW (SFR2_BASE + 0x2c*4)
  166. #define PORTINTRISESRC SFR_RW (SFR2_BASE + 0x2d*4)
  167. #define PORTINTFALLSRC SFR_RW (SFR2_BASE + 0x2e*4)
  168. #define TICK0CON SFR_RW (SFR2_BASE + 0x38*4)
  169. #define TICK0CPND SFR_RW (SFR2_BASE + 0x39*4)
  170. #define TICK0CNT SFR_RW (SFR2_BASE + 0x3a*4)
  171. #define TICK0PR SFR_RW (SFR2_BASE + 0x3b*4)
  172. #define TICK1CON SFR_RW (SFR2_BASE + 0x3c*4)
  173. #define TICK1CPND SFR_RW (SFR2_BASE + 0x3d*4)
  174. #define TICK1CNT SFR_RW (SFR2_BASE + 0x3e*4)
  175. #define TICK1PR SFR_RW (SFR2_BASE + 0x3f*4)
  176. //------------------------- SFR Group3 ---------------------------------------//
  177. #define USBCON0 SFR_RW (SFR3_BASE + 0x00*4)
  178. #define USBCON1 SFR_RW (SFR3_BASE + 0x01*4)
  179. #define USBCON2 SFR_RW (SFR3_BASE + 0x02*4)
  180. #define USBCON3 SFR_RW (SFR3_BASE + 0x03*4)
  181. #define USBCON4 SFR_RW (SFR3_BASE + 0x04*4)
  182. #define SPI1CON SFR_RW (SFR3_BASE + 0x26*4)
  183. #define SPI1BUF SFR_RW (SFR3_BASE + 0x27*4)
  184. #define SPI1BAUD SFR_RW (SFR3_BASE + 0x28*4)
  185. #define SPI1CPND SFR_RW (SFR3_BASE + 0x29*4)
  186. #define SPI1DMACNT SFR_RW (SFR3_BASE + 0x2a*4)
  187. #define SPI1DMAADR SFR_RW (SFR3_BASE + 0x2b*4)
  188. #define WPTDAT SFR_RW (SFR3_BASE + 0x38*4)
  189. #define WPTCON SFR_RW (SFR3_BASE + 0x39*4)
  190. #define WPTPND SFR_RW (SFR3_BASE + 0x3a*4)
  191. #define WPTADR SFR_RW (SFR3_BASE + 0x3b*4)
  192. #define PICCONCLR SFR_RW (SFR4_BASE + 0x0c*4)
  193. #define PICCONSET SFR_RW (SFR4_BASE + 0x0d*4)
  194. #define PICENCLR SFR_RW (SFR4_BASE + 0x0e*4)
  195. #define PICENSET SFR_RW (SFR4_BASE + 0x0f*4)
  196. #define PICCON SFR_RW (SFR4_BASE + 0x10*4)
  197. #define PICEN SFR_RW (SFR4_BASE + 0x11*4)
  198. #define PICPR SFR_RW (SFR4_BASE + 0x12*4)
  199. #define PICADR SFR_RW (SFR4_BASE + 0x13*4)
  200. #define PICPND SFR_RW (SFR4_BASE + 0x14*4)
  201. //------------------------- SFR Group5 ---------------------------------------//
  202. #define IISCON0 SFR_RW (SFR5_BASE + 0x00*4)
  203. #define IISBAUD SFR_RW (SFR5_BASE + 0x01*4)
  204. #define IISDMACNT SFR_RW (SFR5_BASE + 0x02*4)
  205. #define IISDMAOADR0 SFR_RW (SFR5_BASE + 0x03*4)
  206. #define IISDMAOADR1 SFR_RW (SFR5_BASE + 0x04*4)
  207. #define IISDMAIADR0 SFR_RW (SFR5_BASE + 0x05*4)
  208. #define IISDMAIADR1 SFR_RW (SFR5_BASE + 0x06*4)
  209. #define IICCON0 SFR_RW (SFR5_BASE + 0x07*4)
  210. #define IICCON1 SFR_RW (SFR5_BASE + 0x08*4)
  211. #define IICCMDA SFR_RW (SFR5_BASE + 0x09*4)
  212. #define IICDATA SFR_RW (SFR5_BASE + 0x0a*4)
  213. #define IICDMAADR SFR_RW (SFR5_BASE + 0x0b*4)
  214. #define IICDMACNT SFR_RW (SFR5_BASE + 0x0c*4)
  215. #define IICSSTS SFR_RW (SFR5_BASE + 0x0d*4)
  216. //------------------------- SFR Group6 ---------------------------------------//
  217. #define GPIOASET SFR_RW (SFR6_BASE + 0x00*4)
  218. #define GPIOACLR SFR_RW (SFR6_BASE + 0x01*4)
  219. #define GPIOA SFR_RW (SFR6_BASE + 0x02*4)
  220. #define GPIOADIR SFR_RW (SFR6_BASE + 0x03*4)
  221. #define GPIOADE SFR_RW (SFR6_BASE + 0x04*4)
  222. #define GPIOAFEN SFR_RW (SFR6_BASE + 0x05*4)
  223. #define GPIOADRV SFR_RW (SFR6_BASE + 0x06*4)
  224. #define GPIOAPU SFR_RW (SFR6_BASE + 0x07*4)
  225. #define GPIOAPD SFR_RW (SFR6_BASE + 0x08*4)
  226. #define GPIOAPU200K SFR_RW (SFR6_BASE + 0x09*4)
  227. #define GPIOAPD200K SFR_RW (SFR6_BASE + 0x0a*4)
  228. #define GPIOAPU300 SFR_RW (SFR6_BASE + 0x0b*4)
  229. #define GPIOAPD300 SFR_RW (SFR6_BASE + 0x0c*4)
  230. #define GPIOBSET SFR_RW (SFR6_BASE + 0x10*4)
  231. #define GPIOBCLR SFR_RW (SFR6_BASE + 0x11*4)
  232. #define GPIOB SFR_RW (SFR6_BASE + 0x12*4)
  233. #define GPIOBDIR SFR_RW (SFR6_BASE + 0x13*4)
  234. #define GPIOBDE SFR_RW (SFR6_BASE + 0x14*4)
  235. #define GPIOBFEN SFR_RW (SFR6_BASE + 0x15*4)
  236. #define GPIOBDRV SFR_RW (SFR6_BASE + 0x16*4)
  237. #define GPIOBPU SFR_RW (SFR6_BASE + 0x17*4)
  238. #define GPIOBPD SFR_RW (SFR6_BASE + 0x18*4)
  239. #define GPIOBPU200K SFR_RW (SFR6_BASE + 0x19*4)
  240. #define GPIOBPD200K SFR_RW (SFR6_BASE + 0x1a*4)
  241. #define GPIOBPU300 SFR_RW (SFR6_BASE + 0x1b*4)
  242. #define GPIOBPD300 SFR_RW (SFR6_BASE + 0x1c*4)
  243. #define GPIOESET SFR_RW (SFR6_BASE + 0x20*4)
  244. #define GPIOECLR SFR_RW (SFR6_BASE + 0x21*4)
  245. #define GPIOE SFR_RW (SFR6_BASE + 0x22*4)
  246. #define GPIOEDIR SFR_RW (SFR6_BASE + 0x23*4)
  247. #define GPIOEDE SFR_RW (SFR6_BASE + 0x24*4)
  248. #define GPIOEFEN SFR_RW (SFR6_BASE + 0x25*4)
  249. #define GPIOEDRV SFR_RW (SFR6_BASE + 0x26*4)
  250. #define GPIOEPU SFR_RW (SFR6_BASE + 0x27*4)
  251. #define GPIOEPD SFR_RW (SFR6_BASE + 0x28*4)
  252. #define GPIOEPU200K SFR_RW (SFR6_BASE + 0x29*4)
  253. #define GPIOEPD200K SFR_RW (SFR6_BASE + 0x2a*4)
  254. #define GPIOEPU300 SFR_RW (SFR6_BASE + 0x2b*4)
  255. #define GPIOEPD300 SFR_RW (SFR6_BASE + 0x2c*4)
  256. #define GPIOFSET SFR_RW (SFR6_BASE + 0x30*4)
  257. #define GPIOFCLR SFR_RW (SFR6_BASE + 0x31*4)
  258. #define GPIOF SFR_RW (SFR6_BASE + 0x32*4)
  259. #define GPIOFDIR SFR_RW (SFR6_BASE + 0x33*4)
  260. #define GPIOFDE SFR_RW (SFR6_BASE + 0x34*4)
  261. #define GPIOFFEN SFR_RW (SFR6_BASE + 0x35*4)
  262. #define GPIOFDRV SFR_RW (SFR6_BASE + 0x36*4)
  263. #define GPIOFPU SFR_RW (SFR6_BASE + 0x37*4)
  264. #define GPIOFPD SFR_RW (SFR6_BASE + 0x38*4)
  265. #define GPIOFPU200K SFR_RW (SFR6_BASE + 0x39*4)
  266. #define GPIOFPD200K SFR_RW (SFR6_BASE + 0x3a*4)
  267. #define GPIOFPU300 SFR_RW (SFR6_BASE + 0x3b*4)
  268. #define GPIOFPD300 SFR_RW (SFR6_BASE + 0x3c*4)
  269. //------------------------- SFR Group7 ---------------------------------------//
  270. #define GPIOGSET SFR_RW (SFR7_BASE + 0x00*4)
  271. #define GPIOGCLR SFR_RW (SFR7_BASE + 0x01*4)
  272. #define GPIOG SFR_RW (SFR7_BASE + 0x02*4)
  273. #define GPIOGDIR SFR_RW (SFR7_BASE + 0x03*4)
  274. #define GPIOGDE SFR_RW (SFR7_BASE + 0x04*4)
  275. #define GPIOGFEN SFR_RW (SFR7_BASE + 0x05*4)
  276. #define GPIOGDRV SFR_RW (SFR7_BASE + 0x06*4)
  277. #define GPIOGPU SFR_RW (SFR7_BASE + 0x07*4)
  278. #define GPIOGPD SFR_RW (SFR7_BASE + 0x08*4)
  279. #define GPIOGPU200K SFR_RW (SFR7_BASE + 0x09*4)
  280. #define GPIOGPD200K SFR_RW (SFR7_BASE + 0x0a*4)
  281. #define GPIOGPU300 SFR_RW (SFR7_BASE + 0x0b*4)
  282. #define GPIOGPD300 SFR_RW (SFR7_BASE + 0x0c*4)
  283. //------------------------- SFR Group9 ---------------------------------------//
  284. #define IRRXCON SFR_RW (SFR9_BASE + 0x00*4)
  285. #define IRRXDAT SFR_RW (SFR9_BASE + 0x01*4)
  286. #define IRRXCPND SFR_RW (SFR9_BASE + 0x02*4)
  287. #define IRRXERR0 SFR_RW (SFR9_BASE + 0x03*4)
  288. #define IRRXERR1 SFR_RW (SFR9_BASE + 0x04*4)
  289. #define IRRXPR0 SFR_RW (SFR9_BASE + 0x05*4)
  290. #define IRRXPR1 SFR_RW (SFR9_BASE + 0x06*4)
  291. //------------------------- SFR Group11 ---------------------------------------//
  292. #define RTCCON0 SFR_RW (SFR11_BASE + 0x00*4)
  293. #define RTCCON1 SFR_RW (SFR11_BASE + 0x01*4)
  294. #define RTCCON2 SFR_RW (SFR11_BASE + 0x02*4)
  295. #define RTCCON3 SFR_RW (SFR11_BASE + 0x03*4)
  296. #define RTCCON4 SFR_RW (SFR11_BASE + 0x04*4)
  297. #define RTCCON5 SFR_RW (SFR11_BASE + 0x05*4)
  298. #define RTCCON6 SFR_RW (SFR11_BASE + 0x06*4)
  299. #define RTCCON7 SFR_RW (SFR11_BASE + 0x07*4)
  300. #define RTCCON8 SFR_RW (SFR11_BASE + 0x08*4)
  301. #define RTCCON9 SFR_RW (SFR11_BASE + 0x09*4)
  302. #define RTCCON10 SFR_RW (SFR11_BASE + 0x0a*4)
  303. #define RTCCON11 SFR_RW (SFR11_BASE + 0x0b*4)
  304. #define RTCCON12 SFR_RW (SFR11_BASE + 0x0c*4)
  305. #define RTCCON13 SFR_RW (SFR11_BASE + 0x0d*4)
  306. #define RTCCON14 SFR_RW (SFR11_BASE + 0x0e*4)
  307. #define RTCCON15 SFR_RW (SFR11_BASE + 0x0f*4)
  308. #define RTCRAMADR SFR_RW (SFR11_BASE + 0x10*4)
  309. #define RTCRAMDAT SFR_RW (SFR11_BASE + 0x11*4)
  310. #define RTCALM SFR_RW (SFR11_BASE + 0x12*4)
  311. #define RTCCNT SFR_RW (SFR11_BASE + 0x13*4)
  312. #define TKRBCNT SFR_RW (SFR11_BASE + 0x20*4)
  313. #define TK1CNT SFR_RW (SFR11_BASE + 0x21*4)
  314. #define TK2CNT SFR_RW (SFR11_BASE + 0x22*4)
  315. #define TK3CNT SFR_RW (SFR11_BASE + 0x23*4)
  316. #define TK4CNT SFR_RW (SFR11_BASE + 0x24*4)
  317. #define TK5CNT SFR_RW (SFR11_BASE + 0x25*4)
  318. #define TKCDPR2 SFR_RW (SFR11_BASE + 0x26*4)
  319. #define TKVARI SFR_RW (SFR11_BASE + 0x27*4)
  320. #define TKVARITHD SFR_RW (SFR11_BASE + 0x28*4)
  321. #define TKACON0 SFR_RW (SFR11_BASE + 0x29*4)
  322. #define TKACON1 SFR_RW (SFR11_BASE + 0x2a*4)
  323. #define TKIE SFR_RW (SFR11_BASE + 0x2b*4)
  324. #define TKCPND SFR_RW (SFR11_BASE + 0x2c*4)
  325. #define TKCON SFR_RW (SFR11_BASE + 0x2d*4)
  326. #define TKCON1 SFR_RW (SFR11_BASE + 0x2e*4)
  327. #define TK0CNT SFR_RW (SFR11_BASE + 0x2f*4)
  328. #define TKCDPR0 SFR_RW (SFR11_BASE + 0x30*4)
  329. #define TKCDPR1 SFR_RW (SFR11_BASE + 0x31*4)
  330. #define TKTMR SFR_RW (SFR11_BASE + 0x32*4)
  331. #define TETMR SFR_RW (SFR11_BASE + 0x33*4)
  332. #define TKBCNT SFR_RW (SFR11_BASE + 0x34*4)
  333. #define TKPTHD SFR_RW (SFR11_BASE + 0x35*4)
  334. #define TKETHD SFR_RW (SFR11_BASE + 0x36*4)
  335. #define TEBCNT SFR_RW (SFR11_BASE + 0x37*4)
  336. #define TEPTHD SFR_RW (SFR11_BASE + 0x38*4)
  337. #define TEETHD SFR_RW (SFR11_BASE + 0x39*4)
  338. #define TKCON2 SFR_RW (SFR11_BASE + 0x3a*4)
  339. #define TKVARIRP SFR_RW (SFR11_BASE + 0x3b*4)
  340. #define TKDLYPR SFR_RW (SFR11_BASE + 0x3c*4)
  341. //------------------------- SFR Group12 ---------------------------------------//
  342. #define AUBUF1CON SFR_RW (SFR12_BASE + 0x0f*4)
  343. #define AUBUF1DATA SFR_RW (SFR12_BASE + 0x10*4)
  344. //------------------------- SFR Group13 ---------------------------------------//
  345. #define DACDIGCON0 SFR_RW (SFR13_BASE + 0x00*4)
  346. #define DACDIGCON1 SFR_RW (SFR13_BASE + 0x01*4)
  347. #define DACDIGCON2 SFR_RW (SFR13_BASE + 0x02*4)
  348. #define DACDIGCON3 SFR_RW (SFR13_BASE + 0x03*4)
  349. #define DACVOLCON SFR_RW (SFR13_BASE + 0x04*4)
  350. #define AU0LMIXCOEF SFR_RW (SFR13_BASE + 0x05*4)
  351. #define AU0RMIXCOEF SFR_RW (SFR13_BASE + 0x06*4)
  352. #define AU1LMIXCOEF SFR_RW (SFR13_BASE + 0x07*4)
  353. #define AU1RMIXCOEF SFR_RW (SFR13_BASE + 0x08*4)
  354. #define SRC0VOLCON SFR_RW (SFR13_BASE + 0x0b*4)
  355. #define SRC1VOLCON SFR_RW (SFR13_BASE + 0x0c*4)
  356. #define DACBQ0CON SFR_RW (SFR13_BASE + 0x0d*4)
  357. #define SDADCDMACON SFR_RW (SFR14_BASE + 0x00*4)
  358. #define SDADCDMAFLAG SFR_RW (SFR14_BASE + 0x01*4)
  359. #define SDADCDMACLR SFR_RW (SFR14_BASE + 0x02*4)
  360. #define VADDMACON SFR_RW (SFR14_BASE + 0x03*4)
  361. #define SDADC0DMACON SFR_RW (SFR14_BASE + 0x04*4)
  362. #define VADCON0 SFR_RW (SFR14_BASE + 0x2e*4)
  363. #define VADCON1 SFR_RW (SFR14_BASE + 0x2f*4)
  364. #define VADCON2 SFR_RW (SFR14_BASE + 0x30*4)
  365. #ifndef __ASSEMBLER__
  366. enum funo_select_tbl {
  367. FO_T5PWM0 = 0,
  368. FO_T5PWM1,
  369. FO_T5PWM2,
  370. FO_T5PWM3,
  371. FO_UR0TX,
  372. FO_HUR0TX,
  373. FO_UR1TX,
  374. FO_I2CSCL,
  375. FO_I2CSDA,
  376. FO_CLKOUT,
  377. FO_SPI1D0,
  378. FO_SPI1D1,
  379. FO_SPI1CLK,
  380. FO_UR2TX,
  381. };
  382. enum funo_io_tbl {
  383. FO_PA4 = 1,
  384. FO_PA5,
  385. FO_PA6,
  386. FO_PA7,
  387. FO_PB0 = 5,
  388. FO_PB1,
  389. FO_PB2,
  390. FO_PB3,
  391. FO_PB4,
  392. FO_PB5,
  393. FO_PE0 = 11,
  394. FO_PE4,
  395. FO_PE5,
  396. FO_PE6,
  397. FO_PE7,
  398. FO_PF0 = 16,
  399. FO_PF1,
  400. };
  401. enum funi_io_tbl {
  402. FI_PA4 = 0,
  403. FI_PA5,
  404. FI_PA6,
  405. FI_PA7,
  406. FI_PB0 = 4,
  407. FI_PB1,
  408. FI_PB2,
  409. FI_PB3,
  410. FI_PB4,
  411. FI_PB5,
  412. FI_PE0 = 10,
  413. FI_PE4,
  414. FI_PE5,
  415. FI_PE6,
  416. FI_PE7,
  417. FI_PF0 = 15,
  418. FI_PF1,
  419. FI_PG0 = 17,
  420. FI_PG1,
  421. FI_PG2,
  422. FI_PG3,
  423. FI_PG4,
  424. FI_PG5,
  425. };
  426. #endif
  427. //channel output function select
  428. #define CH0_FUNO_SEL(ch0_funo_sel) FUNCOUTCON = (ch0_funo_sel << 0)
  429. #define CH1_FUNO_SEL(ch1_funo_sel) FUNCOUTCON = (ch1_funo_sel << 8)
  430. #define CH2_FUNO_SEL(ch2_funo_sel) FUNCOUTCON = (ch2_funo_sel <<16)
  431. #define CH3_FUNO_SEL(ch3_funo_sel) FUNCOUTCON = (ch3_funo_sel <<24)
  432. //channel 0 output mapping
  433. #define CH0_FUNO_PA4MAP FUNCOUTMCON = ( 1 << 0)
  434. #define CH0_FUNO_PA5MAP FUNCOUTMCON = ( 2 << 0)
  435. #define CH0_FUNO_PA6MAP FUNCOUTMCON = ( 3 << 0)
  436. #define CH0_FUNO_PA7MAP FUNCOUTMCON = ( 4 << 0)
  437. #define CH0_FUNO_PB0MAP FUNCOUTMCON = ( 5 << 0)
  438. #define CH0_FUNO_PB1MAP FUNCOUTMCON = ( 6 << 0)
  439. #define CH0_FUNO_PB2MAP FUNCOUTMCON = ( 7 << 0)
  440. #define CH0_FUNO_PB3MAP FUNCOUTMCON = ( 8 << 0)
  441. #define CH0_FUNO_PB4MAP FUNCOUTMCON = ( 9 << 0)
  442. #define CH0_FUNO_PB5MAP FUNCOUTMCON = (10 << 0)
  443. #define CH0_FUNO_PE0MAP FUNCOUTMCON = (11 << 0)
  444. #define CH0_FUNO_PE4MAP FUNCOUTMCON = (12 << 0)
  445. #define CH0_FUNO_PE5MAP FUNCOUTMCON = (13 << 0)
  446. #define CH0_FUNO_PE6MAP FUNCOUTMCON = (14 << 0)
  447. #define CH0_FUNO_PE7MAP FUNCOUTMCON = (15 << 0)
  448. #define CH0_FUNO_PF0MAP FUNCOUTMCON = (16 << 0)
  449. #define CH0_FUNO_PF1MAP FUNCOUTMCON = (17 << 0)
  450. //channel 1 output mapping
  451. #define CH1_FUNO_PA4MAP FUNCOUTMCON = ( 1 << 8)
  452. #define CH1_FUNO_PA5MAP FUNCOUTMCON = ( 2 << 8)
  453. #define CH1_FUNO_PA6MAP FUNCOUTMCON = ( 3 << 8)
  454. #define CH1_FUNO_PA7MAP FUNCOUTMCON = ( 4 << 8)
  455. #define CH1_FUNO_PB0MAP FUNCOUTMCON = ( 5 << 8)
  456. #define CH1_FUNO_PB1MAP FUNCOUTMCON = ( 6 << 8)
  457. #define CH1_FUNO_PB2MAP FUNCOUTMCON = ( 7 << 8)
  458. #define CH1_FUNO_PB3MAP FUNCOUTMCON = ( 8 << 8)
  459. #define CH1_FUNO_PB4MAP FUNCOUTMCON = ( 9 << 8)
  460. #define CH1_FUNO_PB5MAP FUNCOUTMCON = (10 << 8)
  461. #define CH1_FUNO_PE0MAP FUNCOUTMCON = (11 << 8)
  462. #define CH1_FUNO_PE4MAP FUNCOUTMCON = (12 << 8)
  463. #define CH1_FUNO_PE5MAP FUNCOUTMCON = (13 << 8)
  464. #define CH1_FUNO_PE6MAP FUNCOUTMCON = (14 << 8)
  465. #define CH1_FUNO_PE7MAP FUNCOUTMCON = (15 << 8)
  466. #define CH1_FUNO_PF0MAP FUNCOUTMCON = (16 << 8)
  467. #define CH1_FUNO_PF1MAP FUNCOUTMCON = (17 << 8)
  468. //channel 2 output mapping
  469. #define CH2_FUNO_PA4MAP FUNCOUTMCON = ( 1 <<16)
  470. #define CH2_FUNO_PA5MAP FUNCOUTMCON = ( 2 <<16)
  471. #define CH2_FUNO_PA6MAP FUNCOUTMCON = ( 3 <<16)
  472. #define CH2_FUNO_PA7MAP FUNCOUTMCON = ( 4 <<16)
  473. #define CH2_FUNO_PB0MAP FUNCOUTMCON = ( 5 <<16)
  474. #define CH2_FUNO_PB1MAP FUNCOUTMCON = ( 6 <<16)
  475. #define CH2_FUNO_PB2MAP FUNCOUTMCON = ( 7 <<16)
  476. #define CH2_FUNO_PB3MAP FUNCOUTMCON = ( 8 <<16)
  477. #define CH2_FUNO_PB4MAP FUNCOUTMCON = ( 9 <<16)
  478. #define CH2_FUNO_PB5MAP FUNCOUTMCON = (10 <<16)
  479. #define CH2_FUNO_PE0MAP FUNCOUTMCON = (11 <<16)
  480. #define CH2_FUNO_PE4MAP FUNCOUTMCON = (12 <<16)
  481. #define CH2_FUNO_PE5MAP FUNCOUTMCON = (13 <<16)
  482. #define CH2_FUNO_PE6MAP FUNCOUTMCON = (14 <<16)
  483. #define CH2_FUNO_PE7MAP FUNCOUTMCON = (15 <<16)
  484. #define CH2_FUNO_PF0MAP FUNCOUTMCON = (16 <<16)
  485. #define CH2_FUNO_PF1MAP FUNCOUTMCON = (17 <<16)
  486. //channel 3 output mapping
  487. #define CH3_FUNO_PA4MAP FUNCOUTMCON = ( 1 <<24)
  488. #define CH3_FUNO_PA5MAP FUNCOUTMCON = ( 2 <<24)
  489. #define CH3_FUNO_PA6MAP FUNCOUTMCON = ( 3 <<24)
  490. #define CH3_FUNO_PA7MAP FUNCOUTMCON = ( 4 <<24)
  491. #define CH3_FUNO_PB0MAP FUNCOUTMCON = ( 5 <<24)
  492. #define CH3_FUNO_PB1MAP FUNCOUTMCON = ( 6 <<24)
  493. #define CH3_FUNO_PB2MAP FUNCOUTMCON = ( 7 <<24)
  494. #define CH3_FUNO_PB3MAP FUNCOUTMCON = ( 8 <<24)
  495. #define CH3_FUNO_PB4MAP FUNCOUTMCON = ( 9 <<24)
  496. #define CH3_FUNO_PB5MAP FUNCOUTMCON = (10 <<24)
  497. #define CH3_FUNO_PE0MAP FUNCOUTMCON = (11 <<24)
  498. #define CH3_FUNO_PE4MAP FUNCOUTMCON = (12 <<24)
  499. #define CH3_FUNO_PE5MAP FUNCOUTMCON = (13 <<24)
  500. #define CH3_FUNO_PE6MAP FUNCOUTMCON = (14 <<24)
  501. #define CH3_FUNO_PE7MAP FUNCOUTMCON = (15 <<24)
  502. #define CH3_FUNO_PF0MAP FUNCOUTMCON = (16 <<24)
  503. #define CH3_FUNO_PF1MAP FUNCOUTMCON = (17 <<24)
  504. //channel input function select
  505. #define CH0_FUNI_SEL(ch0_funi_sel) FUNCINCON = (ch0_funi_sel << 0)
  506. #define CH1_FUNI_SEL(ch1_funi_sel) FUNCINCON = (ch1_funi_sel << 8)
  507. #define CH2_FUNI_SEL(ch2_funi_sel) FUNCINCON = (ch2_funi_sel <<16)
  508. #define CH3_FUNI_SEL(ch3_funi_sel) FUNCINCON = (ch3_funi_sel <<24)
  509. #endif