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HQ32
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sdk_bt893x_v013_s8759_20241213
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app
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sfr.h

sfr.h 25 KB
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  1. 

  2. #ifndef _SFR_
    3. 

  3. #define _SFR_
    4. 

  4. 

  5. 

  6. #ifndef __ASSEMBLER__
    7. 

  7. #define SFR_RO *(volatile unsigned long const *)
    8. 

  8. #define SFR_WO *(volatile unsigned long*)
    9. 

  9. #define SFR_RW *(volatile unsigned long*)
    10. 

  10. #define SWINT()      asm(".long 0xb0030057")
    11. 

  11. #define EEBREAKINT() asm(".long 0xb0040057")
    12. 

  12. #else
    13. 

  13. #define SFR_RO
    14. 

  14. #define SFR_WO
    15. 

  15. #define SFR_RW
    16. 

  16. #define SWINT      .long 0xb0030057
    17. 

  17. #define EEBREAKINT .long 0xb0040057
    18. 

  18. #endif
    19. 

  19. 

  20. #define SFR_BASE   0x00000100    // address 0~255 is reserved
    21. 

  21. #define SFR0_BASE  (SFR_BASE + 0x0000)
    22. 

  22. #define SFR1_BASE  (SFR_BASE + 0x0100)
    23. 

  23. #define SFR2_BASE  (SFR_BASE + 0x0200)
    24. 

  24. #define SFR3_BASE  (SFR_BASE + 0x0300)
    25. 

  25. #define SFR4_BASE  (SFR_BASE + 0x0400)
    26. 

  26. #define SFR5_BASE  (SFR_BASE + 0x0500)
    27. 

  27. #define SFR6_BASE  (SFR_BASE + 0x0600)
    28. 

  28. #define SFR7_BASE  (SFR_BASE + 0x0700)
    29. 

  29. #define SFR8_BASE  (SFR_BASE + 0x0800)
    30. 

  30. #define SFR9_BASE  (SFR_BASE + 0x0900)
    31. 

  31. #define SFR10_BASE (SFR_BASE + 0x0a00)
    32. 

  32. #define SFR11_BASE (SFR_BASE + 0x0b00)
    33. 

  33. #define SFR12_BASE (SFR_BASE + 0x0c00)
    34. 

  34. #define SFR13_BASE (SFR_BASE + 0x0d00)
    35. 

  35. #define SFR14_BASE (SFR_BASE + 0x0e00)
    36. 

  36. #define SFR15_BASE (SFR_BASE + 0x0f00)
    37. 

  37. #define SFR16_BASE (SFR_BASE + 0x1000)
    38. 

  38. #define SFR17_BASE (SFR_BASE + 0x1100)
    39. 

  39. #define SFR30_BASE (SFR_BASE + 0x1e00)
    40. 

  40. 

  41. //------------------------- SFR Group0 ---------------------------------------//
    42. 

  42. #define TMR0CON              SFR_RW (SFR0_BASE + 0x00*4)
    43. 

  43. #define TMR0CPND             SFR_RW (SFR0_BASE + 0x01*4)
    44. 

  44. #define TMR0CNT              SFR_RW (SFR0_BASE + 0x02*4)
    45. 

  45. #define TMR0PR               SFR_RW (SFR0_BASE + 0x03*4)
    46. 

  46. #define TMR1CON              SFR_RW (SFR0_BASE + 0x04*4)
    47. 

  47. #define TMR1CPND             SFR_RW (SFR0_BASE + 0x05*4)
    48. 

  48. #define TMR1CNT              SFR_RW (SFR0_BASE + 0x06*4)
    49. 

  49. #define TMR1PR               SFR_RW (SFR0_BASE + 0x07*4)
    50. 

  50. #define TMR2CON              SFR_RW (SFR0_BASE + 0x08*4)
    51. 

  51. #define TMR2CPND             SFR_RW (SFR0_BASE + 0x09*4)
    52. 

  52. #define TMR2CNT              SFR_RW (SFR0_BASE + 0x0a*4)
    53. 

  53. #define TMR2PR               SFR_RW (SFR0_BASE + 0x0b*4)
    54. 

  54. #define TMR3CON              SFR_RW (SFR0_BASE + 0x0c*4)
    55. 

  55. #define TMR3CPND             SFR_RW (SFR0_BASE + 0x0d*4)
    56. 

  56. #define TMR3CNT              SFR_RW (SFR0_BASE + 0x0e*4)
    57. 

  57. #define TMR3PR               SFR_RW (SFR0_BASE + 0x0f*4)
    58. 

  58. #define TMR3CPT              SFR_RW (SFR0_BASE + 0x10*4)
    59. 

  59. #define TMR3DUTY0            SFR_RW (SFR0_BASE + 0x11*4)
    60. 

  60. #define TMR3DUTY1            SFR_RW (SFR0_BASE + 0x12*4)
    61. 

  61. #define TMR3DUTY2            SFR_RW (SFR0_BASE + 0x13*4)
    62. 

  62. #define TMR4CON              SFR_RW (SFR0_BASE + 0x14*4)
    63. 

  63. #define TMR4CPND             SFR_RW (SFR0_BASE + 0x15*4)
    64. 

  64. #define TMR4CNT              SFR_RW (SFR0_BASE + 0x16*4)
    65. 

  65. #define TMR4PR               SFR_RW (SFR0_BASE + 0x17*4)
    66. 

  66. #define TMR4CPT              SFR_RW (SFR0_BASE + 0x18*4)
    67. 

  67. #define TMR4DUTY0            SFR_RW (SFR0_BASE + 0x19*4)
    68. 

  68. #define TMR4DUTY1            SFR_RW (SFR0_BASE + 0x1a*4)
    69. 

  69. #define TMR4DUTY2            SFR_RW (SFR0_BASE + 0x1b*4)
    70. 

  70. #define TMR5CON              SFR_RW (SFR0_BASE + 0x1c*4)
    71. 

  71. #define TMR5CPND             SFR_RW (SFR0_BASE + 0x1d*4)
    72. 

  72. #define TMR5CNT              SFR_RW (SFR0_BASE + 0x1e*4)
    73. 

  73. #define TMR5PR               SFR_RW (SFR0_BASE + 0x1f*4)
    74. 

  74. #define TMR5CPT              SFR_RW (SFR0_BASE + 0x20*4)
    75. 

  75. #define TMR5DUTY0            SFR_RW (SFR0_BASE + 0x21*4)
    76. 

  76. #define TMR5DUTY1            SFR_RW (SFR0_BASE + 0x22*4)
    77. 

  77. #define TMR5DUTY2            SFR_RW (SFR0_BASE + 0x23*4)
    78. 

  78. #define TMR5DUTY3            SFR_RW (SFR0_BASE + 0x24*4)
    79. 

  79. #define TMR5DUTY4            SFR_RW (SFR0_BASE + 0x25*4)
    80. 

  80. #define TMR5DUTY5            SFR_RW (SFR0_BASE + 0x26*4)
    81. 

  81. #define UART0CON             SFR_RW (SFR0_BASE + 0x27*4)
    82. 

  82. #define UART0CPND            SFR_RW (SFR0_BASE + 0x28*4)
    83. 

  83. #define UART0BAUD            SFR_RW (SFR0_BASE + 0x29*4)
    84. 

  84. #define UART0DATA            SFR_RW (SFR0_BASE + 0x2a*4)
    85. 

  85. #define UART1CON             SFR_RW (SFR0_BASE + 0x2b*4)
    86. 

  86. #define UART1CPND            SFR_RW (SFR0_BASE + 0x2c*4)
    87. 

  87. #define UART1BAUD            SFR_RW (SFR0_BASE + 0x2d*4)
    88. 

  88. #define UART1DATA            SFR_RW (SFR0_BASE + 0x2e*4)
    89. 

  89. #define UART2CON             SFR_RW (SFR0_BASE + 0x2f*4)
    90. 

  90. #define UART2CPND            SFR_RW (SFR0_BASE + 0x30*4)
    91. 

  91. #define UART2BAUD            SFR_RW (SFR0_BASE + 0x31*4)
    92. 

  92. #define UART2DATA            SFR_RW (SFR0_BASE + 0x32*4)
    93. 

  93. #define HSUT0CON             SFR_RW (SFR0_BASE + 0x33*4)
    94. 

  94. #define HSUT0CPND            SFR_RW (SFR0_BASE + 0x34*4)
    95. 

  95. #define HSUT0BAUD            SFR_RW (SFR0_BASE + 0x35*4)
    96. 

  96. #define HSUT0DATA            SFR_RW (SFR0_BASE + 0x36*4)
    97. 

  97. #define HSUT0TXCNT           SFR_RW (SFR0_BASE + 0x37*4)
    98. 

  98. #define HSUT0TXADR           SFR_RW (SFR0_BASE + 0x38*4)
    99. 

  99. #define HSUT0RXCNT           SFR_RW (SFR0_BASE + 0x39*4)
    100. 

  100. #define HSUT0RXADR           SFR_RW (SFR0_BASE + 0x3a*4)
    101. 

  101. #define HSUT0FIFOCNT         SFR_RW (SFR0_BASE + 0x3b*4)
    102. 

  102. #define HSUT0FIFO            SFR_RW (SFR0_BASE + 0x3c*4)
    103. 

  103. #define HSUT0FIFOADR         SFR_RW (SFR0_BASE + 0x3d*4)
    104. 

  104. #define HSUT0TMRCNT          SFR_RW (SFR0_BASE + 0x3e*4)
    105. 

  105. #define HSUT0FCCON           SFR_RW (SFR0_BASE + 0x3f*4)
    106. 

  106. 

  107. //------------------------- SFR Group1 ---------------------------------------//
    108. 

  108. #define WDTCON               SFR_RW (SFR1_BASE + 0x00*4)
    109. 

  109. #define RTCCON               SFR_RW (SFR1_BASE + 0x01*4)
    110. 

  110. #define RTCCPND              SFR_RW (SFR1_BASE + 0x02*4)
    111. 

  111. #define PWRCON0              SFR_RW (SFR1_BASE + 0x04*4)
    112. 

  112. #define PWRCON1              SFR_RW (SFR1_BASE + 0x05*4)
    113. 

  113. #define PWRCON2              SFR_RW (SFR1_BASE + 0x06*4)
    114. 

  114. #define PWRCON3              SFR_RW (SFR1_BASE + 0x07*4)
    115. 

  115. #define LPMCON               SFR_RW (SFR1_BASE + 0x08*4)
    116. 

  116. #define LVDCON               SFR_RW (SFR1_BASE + 0x09*4)
    117. 

  117. #define RSTCON0              SFR_RW (SFR1_BASE + 0x0a*4)
    118. 

  118. #define CRSTPND              SFR_RW (SFR1_BASE + 0x0b*4)
    119. 

  119. //efine                      SFR_RW (SFR1_BASE + 0x0c*4)
    120. 

  120. //efine                      SFR_RW (SFR1_BASE + 0x0d*4)
    121. 

  121. //efine                      SFR_RW (SFR1_BASE + 0x0e*4)
    122. 

  122. //efine                      SFR_RW (SFR1_BASE + 0x0f*4)
    123. 

  123. //efine                      SFR_RW (SFR1_BASE + 0x10*4)
    124. 

  124. //efine                      SFR_RW (SFR1_BASE + 0x11*4)
    125. 

  125. //efine                      SFR_RW (SFR1_BASE + 0x12*4)
    126. 

  126. #define XOSCCON              SFR_RW (SFR1_BASE + 0x13*4)
    127. 

  127. #define CLKCON0              SFR_RW (SFR1_BASE + 0x14*4)
    128. 

  128. #define CLKCON1              SFR_RW (SFR1_BASE + 0x15*4)
    129. 

  129. #define CLKCON2              SFR_RW (SFR1_BASE + 0x16*4)
    130. 

  130. #define CLKCON3              SFR_RW (SFR1_BASE + 0x17*4)
    131. 

  131. #define CLKCON4              SFR_RW (SFR1_BASE + 0x18*4)
    132. 

  132. #define CLKCON5              SFR_RW (SFR1_BASE + 0x19*4)
    133. 

  133. #define CLKGAT0              SFR_RW (SFR1_BASE + 0x1a*4)
    134. 

  134. #define CLKGAT1              SFR_RW (SFR1_BASE + 0x1b*4)
    135. 

  135. #define CLKGAT2              SFR_RW (SFR1_BASE + 0x1c*4)
    136. 

  136. #define CLKGAT3              SFR_RW (SFR1_BASE + 0x1d*4)
    137. 

  137. #define CLKGAT4              SFR_RW (SFR1_BASE + 0x1e*4)
    138. 

  138. #define CLKGAT5              SFR_RW (SFR1_BASE + 0x1f*4)
    139. 

  139. #define CLKDIVCON0           SFR_RW (SFR1_BASE + 0x20*4)
    140. 

  140. #define CLKDIVCON1           SFR_RW (SFR1_BASE + 0x21*4)
    141. 

  141. #define CLKDIVCON2           SFR_RW (SFR1_BASE + 0x22*4)
    142. 

  142. #define CLKDIVCON3           SFR_RW (SFR1_BASE + 0x23*4)
    143. 

  143. #define CLKDIVCON4           SFR_RW (SFR1_BASE + 0x24*4)
    144. 

  144. #define CLKDIVCON5           SFR_RW (SFR1_BASE + 0x25*4)
    145. 

  145. #define USERKEY           	 SFR_RW (SFR1_BASE + 0x26*4)
    146. 

  146. #define PROTCON1             SFR_RW (SFR1_BASE + 0x27*4)
    147. 

  147. 

  148. #define PRCLKCON0            SFR_RW (SFR1_BASE + 0x2d*4)
    149. 

  149. #define PRCLKDIVCON0         SFR_RW (SFR1_BASE + 0x2e*4)
    150. 

  150. #define PRCLKDIVCON1         SFR_RW (SFR1_BASE + 0x2f*4)
    151. 

  151. #define PLL0CON0             SFR_RW (SFR1_BASE + 0x30*4)
    152. 

  152. #define PLL0CON1             SFR_RW (SFR1_BASE + 0x31*4)
    153. 

  153. #define PLL0DIV              SFR_RW (SFR1_BASE + 0x32*4)
    154. 

  154. #define VERSIONID            SFR_RW (SFR1_BASE + 0x3f*4)
    155. 

  155. 

  156. //------------------------- SFR Group2 ---------------------------------------//
    157. 

  157. #define BTCON2               SFR_RW (SFR2_BASE + 0x00*4)
    158. 

  158. #define FUNCINCON            SFR_RW (SFR2_BASE + 0x1d*4)
    159. 

  159. #define FUNCOUTCON           SFR_RW (SFR2_BASE + 0x1e*4)
    160. 

  160. #define FUNCOUTMCON          SFR_RW (SFR2_BASE + 0x1f*4)
    161. 

  161. #define FUNCMCON0            SFR_RW (SFR2_BASE + 0x20*4)
    162. 

  162. #define FUNCMCON1            SFR_RW (SFR2_BASE + 0x21*4)
    163. 

  163. #define FUNCMCON2            SFR_RW (SFR2_BASE + 0x22*4)
    164. 

  164. #define FUNCMCON3            SFR_RW (SFR2_BASE + 0x23*4)
    165. 

  165. #define FUNCMCON4            SFR_RW (SFR2_BASE + 0x24*4)
    166. 

  166. #define FUNCMCON5            SFR_RW (SFR2_BASE + 0x25*4)
    167. 

  167. #define WKUPCON              SFR_RW (SFR2_BASE + 0x26*4)
    168. 

  168. #define WKUPEDG              SFR_RW (SFR2_BASE + 0x27*4)
    169. 

  169. #define WKUPIE               SFR_RW (SFR2_BASE + 0x28*4)
    170. 

  170. #define WKUPCPND             SFR_RW (SFR2_BASE + 0x29*4)
    171. 

  171. #define WKPINMAP             SFR_RW (SFR2_BASE + 0x2a*4)
    172. 

  172. #define PORTINTEDG           SFR_RW (SFR2_BASE + 0x2b*4)
    173. 

  173. #define PORTINTEN            SFR_RW (SFR2_BASE + 0x2c*4)
    174. 

  174. #define PORTINTRISESRC       SFR_RW (SFR2_BASE + 0x2d*4)
    175. 

  175. #define PORTINTFALLSRC       SFR_RW (SFR2_BASE + 0x2e*4)
    176. 

  176. 

  177. #define TICK0CON             SFR_RW (SFR2_BASE + 0x38*4)
    178. 

  178. #define TICK0CPND            SFR_RW (SFR2_BASE + 0x39*4)
    179. 

  179. #define TICK0CNT             SFR_RW (SFR2_BASE + 0x3a*4)
    180. 

  180. #define TICK0PR              SFR_RW (SFR2_BASE + 0x3b*4)
    181. 

  181. #define TICK1CON             SFR_RW (SFR2_BASE + 0x3c*4)
    182. 

  182. #define TICK1CPND            SFR_RW (SFR2_BASE + 0x3d*4)
    183. 

  183. #define TICK1CNT             SFR_RW (SFR2_BASE + 0x3e*4)
    184. 

  184. #define TICK1PR              SFR_RW (SFR2_BASE + 0x3f*4)
    185. 

  185. 

  186. //------------------------- SFR Group3 ---------------------------------------//
    187. 

  187. #define USBCON0              SFR_RW (SFR3_BASE + 0x00*4)
    188. 

  188. #define USBCON1              SFR_RW (SFR3_BASE + 0x01*4)
    189. 

  189. #define USBCON2              SFR_RW (SFR3_BASE + 0x02*4)
    190. 

  190. #define USBCON3              SFR_RW (SFR3_BASE + 0x03*4)
    191. 

  191. #define USBCON4              SFR_RW (SFR3_BASE + 0x04*4)
    192. 

  192. #define SPI1CON              SFR_RW (SFR3_BASE + 0x26*4)
    193. 

  193. #define SPI1BUF              SFR_RW (SFR3_BASE + 0x27*4)
    194. 

  194. #define SPI1BAUD             SFR_RW (SFR3_BASE + 0x28*4)
    195. 

  195. #define SPI1CPND             SFR_RW (SFR3_BASE + 0x29*4)
    196. 

  196. #define SPI1DMACNT           SFR_RW (SFR3_BASE + 0x2a*4)
    197. 

  197. #define SPI1DMAADR           SFR_RW (SFR3_BASE + 0x2b*4)
    198. 

  198. 

  199. #define WPTDAT               SFR_RW (SFR3_BASE + 0x38*4)
    200. 

  200. #define WPTCON               SFR_RW (SFR3_BASE + 0x39*4)
    201. 

  201. #define WPTPND               SFR_RW (SFR3_BASE + 0x3a*4)
    202. 

  202. #define WPTADR               SFR_RW (SFR3_BASE + 0x3b*4)
    203. 

  203. #define PICCONCLR            SFR_RW (SFR4_BASE + 0x0c*4)
    204. 

  204. #define PICCONSET            SFR_RW (SFR4_BASE + 0x0d*4)
    205. 

  205. #define PICENCLR             SFR_RW (SFR4_BASE + 0x0e*4)
    206. 

  206. #define PICENSET             SFR_RW (SFR4_BASE + 0x0f*4)
    207. 

  207. #define PICCON               SFR_RW (SFR4_BASE + 0x10*4)
    208. 

  208. #define PICEN                SFR_RW (SFR4_BASE + 0x11*4)
    209. 

  209. #define PICPR                SFR_RW (SFR4_BASE + 0x12*4)
    210. 

  210. #define PICADR               SFR_RW (SFR4_BASE + 0x13*4)
    211. 

  211. #define PICPND               SFR_RW (SFR4_BASE + 0x14*4)
    212. 

  212. 

  213. //------------------------- SFR Group5 ---------------------------------------//
    214. 

  214. #define IISCON0              SFR_RW (SFR5_BASE + 0x00*4)
    215. 

  215. #define IISBAUD              SFR_RW (SFR5_BASE + 0x01*4)
    216. 

  216. #define IISDMACNT            SFR_RW (SFR5_BASE + 0x02*4)
    217. 

  217. #define IISDMAOADR0          SFR_RW (SFR5_BASE + 0x03*4)
    218. 

  218. #define IISDMAOADR1          SFR_RW (SFR5_BASE + 0x04*4)
    219. 

  219. #define IISDMAIADR0          SFR_RW (SFR5_BASE + 0x05*4)
    220. 

  220. #define IISDMAIADR1          SFR_RW (SFR5_BASE + 0x06*4)
    221. 

  221. #define IICCON0              SFR_RW (SFR5_BASE + 0x07*4)
    222. 

  222. #define IICCON1              SFR_RW (SFR5_BASE + 0x08*4)
    223. 

  223. #define IICCMDA              SFR_RW (SFR5_BASE + 0x09*4)
    224. 

  224. #define IICDATA              SFR_RW (SFR5_BASE + 0x0a*4)
    225. 

  225. #define IICDMAADR            SFR_RW (SFR5_BASE + 0x0b*4)
    226. 

  226. #define IICDMACNT            SFR_RW (SFR5_BASE + 0x0c*4)
    227. 

  227. #define IICSSTS              SFR_RW (SFR5_BASE + 0x0d*4)
    228. 

  228. 

  229. //------------------------- SFR Group6 ---------------------------------------//
    230. 

  230. #define GPIOASET        SFR_RW (SFR6_BASE + 0x00*4)
    231. 

  231. #define GPIOACLR        SFR_RW (SFR6_BASE + 0x01*4)
    232. 

  232. #define GPIOA           SFR_RW (SFR6_BASE + 0x02*4)
    233. 

  233. #define GPIOADIR        SFR_RW (SFR6_BASE + 0x03*4)
    234. 

  234. #define GPIOADE         SFR_RW (SFR6_BASE + 0x04*4)
    235. 

  235. #define GPIOAFEN        SFR_RW (SFR6_BASE + 0x05*4)
    236. 

  236. #define GPIOADRV        SFR_RW (SFR6_BASE + 0x06*4)
    237. 

  237. #define GPIOAPU         SFR_RW (SFR6_BASE + 0x07*4)
    238. 

  238. #define GPIOAPD         SFR_RW (SFR6_BASE + 0x08*4)
    239. 

  239. #define GPIOAPU200K     SFR_RW (SFR6_BASE + 0x09*4)
    240. 

  240. #define GPIOAPD200K     SFR_RW (SFR6_BASE + 0x0a*4)
    241. 

  241. #define GPIOAPU300      SFR_RW (SFR6_BASE + 0x0b*4)
    242. 

  242. #define GPIOAPD300      SFR_RW (SFR6_BASE + 0x0c*4)
    243. 

  243. 

  244. #define GPIOBSET        SFR_RW (SFR6_BASE + 0x10*4)
    245. 

  245. #define GPIOBCLR        SFR_RW (SFR6_BASE + 0x11*4)
    246. 

  246. #define GPIOB           SFR_RW (SFR6_BASE + 0x12*4)
    247. 

  247. #define GPIOBDIR        SFR_RW (SFR6_BASE + 0x13*4)
    248. 

  248. #define GPIOBDE         SFR_RW (SFR6_BASE + 0x14*4)
    249. 

  249. #define GPIOBFEN        SFR_RW (SFR6_BASE + 0x15*4)
    250. 

  250. #define GPIOBDRV        SFR_RW (SFR6_BASE + 0x16*4)
    251. 

  251. #define GPIOBPU         SFR_RW (SFR6_BASE + 0x17*4)
    252. 

  252. #define GPIOBPD         SFR_RW (SFR6_BASE + 0x18*4)
    253. 

  253. #define GPIOBPU200K     SFR_RW (SFR6_BASE + 0x19*4)
    254. 

  254. #define GPIOBPD200K     SFR_RW (SFR6_BASE + 0x1a*4)
    255. 

  255. #define GPIOBPU300      SFR_RW (SFR6_BASE + 0x1b*4)
    256. 

  256. #define GPIOBPD300      SFR_RW (SFR6_BASE + 0x1c*4)
    257. 

  257. 

  258. #define GPIOESET        SFR_RW (SFR6_BASE + 0x20*4)
    259. 

  259. #define GPIOECLR        SFR_RW (SFR6_BASE + 0x21*4)
    260. 

  260. #define GPIOE           SFR_RW (SFR6_BASE + 0x22*4)
    261. 

  261. #define GPIOEDIR        SFR_RW (SFR6_BASE + 0x23*4)
    262. 

  262. #define GPIOEDE         SFR_RW (SFR6_BASE + 0x24*4)
    263. 

  263. #define GPIOEFEN        SFR_RW (SFR6_BASE + 0x25*4)
    264. 

  264. #define GPIOEDRV        SFR_RW (SFR6_BASE + 0x26*4)
    265. 

  265. #define GPIOEPU         SFR_RW (SFR6_BASE + 0x27*4)
    266. 

  266. #define GPIOEPD         SFR_RW (SFR6_BASE + 0x28*4)
    267. 

  267. #define GPIOEPU200K     SFR_RW (SFR6_BASE + 0x29*4)
    268. 

  268. #define GPIOEPD200K     SFR_RW (SFR6_BASE + 0x2a*4)
    269. 

  269. #define GPIOEPU300      SFR_RW (SFR6_BASE + 0x2b*4)
    270. 

  270. #define GPIOEPD300      SFR_RW (SFR6_BASE + 0x2c*4)
    271. 

  271. 

  272. #define GPIOFSET        SFR_RW (SFR6_BASE + 0x30*4)
    273. 

  273. #define GPIOFCLR        SFR_RW (SFR6_BASE + 0x31*4)
    274. 

  274. #define GPIOF           SFR_RW (SFR6_BASE + 0x32*4)
    275. 

  275. #define GPIOFDIR        SFR_RW (SFR6_BASE + 0x33*4)
    276. 

  276. #define GPIOFDE         SFR_RW (SFR6_BASE + 0x34*4)
    277. 

  277. #define GPIOFFEN        SFR_RW (SFR6_BASE + 0x35*4)
    278. 

  278. #define GPIOFDRV        SFR_RW (SFR6_BASE + 0x36*4)
    279. 

  279. #define GPIOFPU         SFR_RW (SFR6_BASE + 0x37*4)
    280. 

  280. #define GPIOFPD         SFR_RW (SFR6_BASE + 0x38*4)
    281. 

  281. #define GPIOFPU200K     SFR_RW (SFR6_BASE + 0x39*4)
    282. 

  282. #define GPIOFPD200K     SFR_RW (SFR6_BASE + 0x3a*4)
    283. 

  283. #define GPIOFPU300      SFR_RW (SFR6_BASE + 0x3b*4)
    284. 

  284. #define GPIOFPD300      SFR_RW (SFR6_BASE + 0x3c*4)
    285. 

  285. 

  286. //------------------------- SFR Group7 ---------------------------------------//
    287. 

  287. #define GPIOGSET        SFR_RW (SFR7_BASE + 0x00*4)
    288. 

  288. #define GPIOGCLR        SFR_RW (SFR7_BASE + 0x01*4)
    289. 

  289. #define GPIOG           SFR_RW (SFR7_BASE + 0x02*4)
    290. 

  290. #define GPIOGDIR        SFR_RW (SFR7_BASE + 0x03*4)
    291. 

  291. #define GPIOGDE         SFR_RW (SFR7_BASE + 0x04*4)
    292. 

  292. #define GPIOGFEN        SFR_RW (SFR7_BASE + 0x05*4)
    293. 

  293. #define GPIOGDRV        SFR_RW (SFR7_BASE + 0x06*4)
    294. 

  294. #define GPIOGPU         SFR_RW (SFR7_BASE + 0x07*4)
    295. 

  295. #define GPIOGPD         SFR_RW (SFR7_BASE + 0x08*4)
    296. 

  296. #define GPIOGPU200K     SFR_RW (SFR7_BASE + 0x09*4)
    297. 

  297. #define GPIOGPD200K     SFR_RW (SFR7_BASE + 0x0a*4)
    298. 

  298. #define GPIOGPU300      SFR_RW (SFR7_BASE + 0x0b*4)
    299. 

  299. #define GPIOGPD300      SFR_RW (SFR7_BASE + 0x0c*4)
    300. 

  300. 

  301. //------------------------- SFR Group9 ---------------------------------------//
    302. 

  302. #define IRRXCON              SFR_RW (SFR9_BASE + 0x00*4)
    303. 

  303. #define IRRXDAT              SFR_RW (SFR9_BASE + 0x01*4)
    304. 

  304. #define IRRXCPND             SFR_RW (SFR9_BASE + 0x02*4)
    305. 

  305. #define IRRXERR0             SFR_RW (SFR9_BASE + 0x03*4)
    306. 

  306. #define IRRXERR1             SFR_RW (SFR9_BASE + 0x04*4)
    307. 

  307. #define IRRXPR0              SFR_RW (SFR9_BASE + 0x05*4)
    308. 

  308. #define IRRXPR1              SFR_RW (SFR9_BASE + 0x06*4)
    309. 

  309. 

  310. //------------------------- SFR Group11 ---------------------------------------//
    311. 

  311. #define RTCCON0              SFR_RW (SFR11_BASE + 0x00*4)
    312. 

  312. #define RTCCON1              SFR_RW (SFR11_BASE + 0x01*4)
    313. 

  313. #define RTCCON2              SFR_RW (SFR11_BASE + 0x02*4)
    314. 

  314. #define RTCCON3              SFR_RW (SFR11_BASE + 0x03*4)
    315. 

  315. #define RTCCON4              SFR_RW (SFR11_BASE + 0x04*4)
    316. 

  316. #define RTCCON5              SFR_RW (SFR11_BASE + 0x05*4)
    317. 

  317. #define RTCCON6              SFR_RW (SFR11_BASE + 0x06*4)
    318. 

  318. #define RTCCON7              SFR_RW (SFR11_BASE + 0x07*4)
    319. 

  319. #define RTCCON8              SFR_RW (SFR11_BASE + 0x08*4)
    320. 

  320. #define RTCCON9              SFR_RW (SFR11_BASE + 0x09*4)
    321. 

  321. #define RTCCON10             SFR_RW (SFR11_BASE + 0x0a*4)
    322. 

  322. #define RTCCON11             SFR_RW (SFR11_BASE + 0x0b*4)
    323. 

  323. #define RTCCON12             SFR_RW (SFR11_BASE + 0x0c*4)
    324. 

  324. #define RTCCON13             SFR_RW (SFR11_BASE + 0x0d*4)
    325. 

  325. #define RTCCON14             SFR_RW (SFR11_BASE + 0x0e*4)
    326. 

  326. #define RTCCON15             SFR_RW (SFR11_BASE + 0x0f*4)
    327. 

  327. #define RTCRAMADR            SFR_RW (SFR11_BASE + 0x10*4)
    328. 

  328. #define RTCRAMDAT            SFR_RW (SFR11_BASE + 0x11*4)
    329. 

  329. #define RTCALM               SFR_RW (SFR11_BASE + 0x12*4)
    330. 

  330. #define RTCCNT               SFR_RW (SFR11_BASE + 0x13*4)
    331. 

  331. 

  332. #define TKRBCNT              SFR_RW (SFR11_BASE + 0x20*4)
    333. 

  333. #define TK1CNT               SFR_RW (SFR11_BASE + 0x21*4)
    334. 

  334. #define TK2CNT               SFR_RW (SFR11_BASE + 0x22*4)
    335. 

  335. #define TK3CNT               SFR_RW (SFR11_BASE + 0x23*4)
    336. 

  336. #define TK4CNT               SFR_RW (SFR11_BASE + 0x24*4)
    337. 

  337. #define TK5CNT               SFR_RW (SFR11_BASE + 0x25*4)
    338. 

  338. #define TKCDPR2              SFR_RW (SFR11_BASE + 0x26*4)
    339. 

  339. #define TKVARI               SFR_RW (SFR11_BASE + 0x27*4)
    340. 

  340. #define TKVARITHD            SFR_RW (SFR11_BASE + 0x28*4)
    341. 

  341. #define TKACON0              SFR_RW (SFR11_BASE + 0x29*4)
    342. 

  342. #define TKACON1              SFR_RW (SFR11_BASE + 0x2a*4)
    343. 

  343. #define TKIE                 SFR_RW (SFR11_BASE + 0x2b*4)
    344. 

  344. #define TKCPND               SFR_RW (SFR11_BASE + 0x2c*4)
    345. 

  345. #define TKCON                SFR_RW (SFR11_BASE + 0x2d*4)
    346. 

  346. #define TKCON1               SFR_RW (SFR11_BASE + 0x2e*4)
    347. 

  347. #define TK0CNT               SFR_RW (SFR11_BASE + 0x2f*4)
    348. 

  348. #define TKCDPR0              SFR_RW (SFR11_BASE + 0x30*4)
    349. 

  349. #define TKCDPR1              SFR_RW (SFR11_BASE + 0x31*4)
    350. 

  350. #define TKTMR                SFR_RW (SFR11_BASE + 0x32*4)
    351. 

  351. #define TETMR                SFR_RW (SFR11_BASE + 0x33*4)
    352. 

  352. #define TKBCNT               SFR_RW (SFR11_BASE + 0x34*4)
    353. 

  353. #define TKPTHD               SFR_RW (SFR11_BASE + 0x35*4)
    354. 

  354. #define TKETHD               SFR_RW (SFR11_BASE + 0x36*4)
    355. 

  355. #define TEBCNT               SFR_RW (SFR11_BASE + 0x37*4)
    356. 

  356. #define TEPTHD               SFR_RW (SFR11_BASE + 0x38*4)
    357. 

  357. #define TEETHD               SFR_RW (SFR11_BASE + 0x39*4)
    358. 

  358. #define TKCON2               SFR_RW (SFR11_BASE + 0x3a*4)
    359. 

  359. #define TKVARIRP             SFR_RW (SFR11_BASE + 0x3b*4)
    360. 

  360. #define TKDLYPR              SFR_RW (SFR11_BASE + 0x3c*4)
    361. 

  361. 

  362. //------------------------- SFR Group12 ---------------------------------------//
    363. 

  363. #define AUBUF1CON            SFR_RW (SFR12_BASE + 0x0f*4)
    364. 

  364. #define AUBUF1DATA           SFR_RW (SFR12_BASE + 0x10*4)
    365. 

  365. 

  366. //------------------------- SFR Group13 ---------------------------------------//
    367. 

  367. #define DACDIGCON0           SFR_RW (SFR13_BASE + 0x00*4)
    368. 

  368. #define DACDIGCON1           SFR_RW (SFR13_BASE + 0x01*4)
    369. 

  369. #define DACDIGCON2           SFR_RW (SFR13_BASE + 0x02*4)
    370. 

  370. #define DACDIGCON3           SFR_RW (SFR13_BASE + 0x03*4)
    371. 

  371. #define DACVOLCON            SFR_RW (SFR13_BASE + 0x04*4)
    372. 

  372. #define AU0LMIXCOEF          SFR_RW (SFR13_BASE + 0x05*4)
    373. 

  373. #define AU0RMIXCOEF          SFR_RW (SFR13_BASE + 0x06*4)
    374. 

  374. #define AU1LMIXCOEF          SFR_RW (SFR13_BASE + 0x07*4)
    375. 

  375. #define AU1RMIXCOEF          SFR_RW (SFR13_BASE + 0x08*4)
    376. 

  376. #define SRC0VOLCON           SFR_RW (SFR13_BASE + 0x0b*4)
    377. 

  377. #define SRC1VOLCON           SFR_RW (SFR13_BASE + 0x0c*4)
    378. 

  378. #define DACBQ0CON            SFR_RW (SFR13_BASE + 0x0d*4)
    379. 

  379. 

  380. #define SDADCDMACON          SFR_RW (SFR14_BASE + 0x00*4)
    381. 

  381. #define SDADCDMAFLAG         SFR_RW (SFR14_BASE + 0x01*4)
    382. 

  382. #define SDADCDMACLR          SFR_RW (SFR14_BASE + 0x02*4)
    383. 

  383. #define VADDMACON            SFR_RW (SFR14_BASE + 0x03*4)
    384. 

  384. #define SDADC0DMACON         SFR_RW (SFR14_BASE + 0x04*4)
    385. 

  385. #define VADCON0              SFR_RW (SFR14_BASE + 0x2e*4)
    386. 

  386. #define VADCON1              SFR_RW (SFR14_BASE + 0x2f*4)
    387. 

  387. #define VADCON2              SFR_RW (SFR14_BASE + 0x30*4)
    388. 

  388. 

  389. #ifndef __ASSEMBLER__
    390. 

  390. enum funo_select_tbl {
    391. 

  391.     FO_T5PWM0              = 0,
    392. 

  392.     FO_T5PWM1,
    393. 

  393.     FO_T5PWM2,
    394. 

  394.     FO_T5PWM3,
    395. 

  395.     FO_UR0TX,
    396. 

  396.     FO_HUR0TX,
    397. 

  397.     FO_UR1TX,
    398. 

  398.     FO_I2CSCL,
    399. 

  399.     FO_I2CSDA,
    400. 

  400.     FO_CLKOUT,
    401. 

  401.     FO_SPI1D0,
    402. 

  402.     FO_SPI1D1,
    403. 

  403.     FO_SPI1CLK,
    404. 

  404.     FO_UR2TX,
    405. 

  405. };
    406. 

  406. 

  407. enum funo_io_tbl {
    408. 

  408.     FO_PA4              = 1,
    409. 

  409.     FO_PA5,
    410. 

  410.     FO_PA6,
    411. 

  411.     FO_PA7,
    412. 

  412.     FO_PB0              = 5,
    413. 

  413.     FO_PB1,
    414. 

  414.     FO_PB2,
    415. 

  415.     FO_PB3,
    416. 

  416.     FO_PB4,
    417. 

  417.     FO_PB5,
    418. 

  418.     FO_PE0              = 11,
    419. 

  419.     FO_PE4,
    420. 

  420.     FO_PE5,
    421. 

  421.     FO_PE6,
    422. 

  422.     FO_PE7,
    423. 

  423.     FO_PF0              = 16,
    424. 

  424.     FO_PF1,
    425. 

  425. };
    426. 

  426. 

  427. enum funi_io_tbl {
    428. 

  428.     FI_PA4              = 0,
    429. 

  429.     FI_PA5,
    430. 

  430.     FI_PA6,
    431. 

  431.     FI_PA7,
    432. 

  432.     FI_PB0              = 4,
    433. 

  433.     FI_PB1,
    434. 

  434.     FI_PB2,
    435. 

  435.     FI_PB3,
    436. 

  436.     FI_PB4,
    437. 

  437.     FI_PB5,
    438. 

  438.     FI_PE0              = 10,
    439. 

  439.     FI_PE4,
    440. 

  440.     FI_PE5,
    441. 

  441.     FI_PE6,
    442. 

  442.     FI_PE7,
    443. 

  443.     FI_PF0              = 15,
    444. 

  444.     FI_PF1,
    445. 

  445.     FI_PG0              = 17,
    446. 

  446.     FI_PG1,
    447. 

  447.     FI_PG2,
    448. 

  448.     FI_PG3,
    449. 

  449.     FI_PG4,
    450. 

  450.     FI_PG5,
    451. 

  451. };
    452. 

  452. #endif
    453. 

  453. 

  454. //channel output function select
    455. 

  455. #define CH0_FUNO_SEL(ch0_funo_sel) FUNCOUTCON = (ch0_funo_sel << 0)
    456. 

  456. #define CH1_FUNO_SEL(ch1_funo_sel) FUNCOUTCON = (ch1_funo_sel << 8)
    457. 

  457. #define CH2_FUNO_SEL(ch2_funo_sel) FUNCOUTCON = (ch2_funo_sel <<16)
    458. 

  458. #define CH3_FUNO_SEL(ch3_funo_sel) FUNCOUTCON = (ch3_funo_sel <<24)
    459. 

  459. 

  460. //channel 0 output mapping
    461. 

  461. #define CH0_FUNO_PA4MAP            FUNCOUTMCON = ( 1 << 0)
    462. 

  462. #define CH0_FUNO_PA5MAP            FUNCOUTMCON = ( 2 << 0)
    463. 

  463. #define CH0_FUNO_PA6MAP            FUNCOUTMCON = ( 3 << 0)
    464. 

  464. #define CH0_FUNO_PA7MAP            FUNCOUTMCON = ( 4 << 0)
    465. 

  465. 

  466. #define CH0_FUNO_PB0MAP            FUNCOUTMCON = ( 5 << 0)
    467. 

  467. #define CH0_FUNO_PB1MAP            FUNCOUTMCON = ( 6 << 0)
    468. 

  468. #define CH0_FUNO_PB2MAP            FUNCOUTMCON = ( 7 << 0)
    469. 

  469. #define CH0_FUNO_PB3MAP            FUNCOUTMCON = ( 8 << 0)
    470. 

  470. #define CH0_FUNO_PB4MAP            FUNCOUTMCON = ( 9 << 0)
    471. 

  471. #define CH0_FUNO_PB5MAP            FUNCOUTMCON = (10 << 0)
    472. 

  472. 

  473. #define CH0_FUNO_PE0MAP            FUNCOUTMCON = (11 << 0)
    474. 

  474. #define CH0_FUNO_PE4MAP            FUNCOUTMCON = (12 << 0)
    475. 

  475. #define CH0_FUNO_PE5MAP            FUNCOUTMCON = (13 << 0)
    476. 

  476. #define CH0_FUNO_PE6MAP            FUNCOUTMCON = (14 << 0)
    477. 

  477. #define CH0_FUNO_PE7MAP            FUNCOUTMCON = (15 << 0)
    478. 

  478. 

  479. #define CH0_FUNO_PF0MAP            FUNCOUTMCON = (16 << 0)
    480. 

  480. #define CH0_FUNO_PF1MAP            FUNCOUTMCON = (17 << 0)
    481. 

  481. 

  482. //channel 1 output mapping
    483. 

  483. #define CH1_FUNO_PA4MAP            FUNCOUTMCON = ( 1 << 8)
    484. 

  484. #define CH1_FUNO_PA5MAP            FUNCOUTMCON = ( 2 << 8)
    485. 

  485. #define CH1_FUNO_PA6MAP            FUNCOUTMCON = ( 3 << 8)
    486. 

  486. #define CH1_FUNO_PA7MAP            FUNCOUTMCON = ( 4 << 8)
    487. 

  487. 

  488. #define CH1_FUNO_PB0MAP            FUNCOUTMCON = ( 5 << 8)
    489. 

  489. #define CH1_FUNO_PB1MAP            FUNCOUTMCON = ( 6 << 8)
    490. 

  490. #define CH1_FUNO_PB2MAP            FUNCOUTMCON = ( 7 << 8)
    491. 

  491. #define CH1_FUNO_PB3MAP            FUNCOUTMCON = ( 8 << 8)
    492. 

  492. #define CH1_FUNO_PB4MAP            FUNCOUTMCON = ( 9 << 8)
    493. 

  493. #define CH1_FUNO_PB5MAP            FUNCOUTMCON = (10 << 8)
    494. 

  494. 

  495. #define CH1_FUNO_PE0MAP            FUNCOUTMCON = (11 << 8)
    496. 

  496. #define CH1_FUNO_PE4MAP            FUNCOUTMCON = (12 << 8)
    497. 

  497. #define CH1_FUNO_PE5MAP            FUNCOUTMCON = (13 << 8)
    498. 

  498. #define CH1_FUNO_PE6MAP            FUNCOUTMCON = (14 << 8)
    499. 

  499. #define CH1_FUNO_PE7MAP            FUNCOUTMCON = (15 << 8)
    500. 

  500. 

  501. #define CH1_FUNO_PF0MAP            FUNCOUTMCON = (16 << 8)
    502. 

  502. #define CH1_FUNO_PF1MAP            FUNCOUTMCON = (17 << 8)
    503. 

  503. 

  504. //channel 2 output mapping
    505. 

  505. #define CH2_FUNO_PA4MAP            FUNCOUTMCON = ( 1 <<16)
    506. 

  506. #define CH2_FUNO_PA5MAP            FUNCOUTMCON = ( 2 <<16)
    507. 

  507. #define CH2_FUNO_PA6MAP            FUNCOUTMCON = ( 3 <<16)
    508. 

  508. #define CH2_FUNO_PA7MAP            FUNCOUTMCON = ( 4 <<16)
    509. 

  509. 

  510. #define CH2_FUNO_PB0MAP            FUNCOUTMCON = ( 5 <<16)
    511. 

  511. #define CH2_FUNO_PB1MAP            FUNCOUTMCON = ( 6 <<16)
    512. 

  512. #define CH2_FUNO_PB2MAP            FUNCOUTMCON = ( 7 <<16)
    513. 

  513. #define CH2_FUNO_PB3MAP            FUNCOUTMCON = ( 8 <<16)
    514. 

  514. #define CH2_FUNO_PB4MAP            FUNCOUTMCON = ( 9 <<16)
    515. 

  515. #define CH2_FUNO_PB5MAP            FUNCOUTMCON = (10 <<16)
    516. 

  516. 

  517. #define CH2_FUNO_PE0MAP            FUNCOUTMCON = (11 <<16)
    518. 

  518. #define CH2_FUNO_PE4MAP            FUNCOUTMCON = (12 <<16)
    519. 

  519. #define CH2_FUNO_PE5MAP            FUNCOUTMCON = (13 <<16)
    520. 

  520. #define CH2_FUNO_PE6MAP            FUNCOUTMCON = (14 <<16)
    521. 

  521. #define CH2_FUNO_PE7MAP            FUNCOUTMCON = (15 <<16)
    522. 

  522. 

  523. #define CH2_FUNO_PF0MAP            FUNCOUTMCON = (16 <<16)
    524. 

  524. #define CH2_FUNO_PF1MAP            FUNCOUTMCON = (17 <<16)
    525. 

  525. 

  526. //channel 3 output mapping
    527. 

  527. #define CH3_FUNO_PA4MAP            FUNCOUTMCON = ( 1 <<24)
    528. 

  528. #define CH3_FUNO_PA5MAP            FUNCOUTMCON = ( 2 <<24)
    529. 

  529. #define CH3_FUNO_PA6MAP            FUNCOUTMCON = ( 3 <<24)
    530. 

  530. #define CH3_FUNO_PA7MAP            FUNCOUTMCON = ( 4 <<24)
    531. 

  531. 

  532. #define CH3_FUNO_PB0MAP            FUNCOUTMCON = ( 5 <<24)
    533. 

  533. #define CH3_FUNO_PB1MAP            FUNCOUTMCON = ( 6 <<24)
    534. 

  534. #define CH3_FUNO_PB2MAP            FUNCOUTMCON = ( 7 <<24)
    535. 

  535. #define CH3_FUNO_PB3MAP            FUNCOUTMCON = ( 8 <<24)
    536. 

  536. #define CH3_FUNO_PB4MAP            FUNCOUTMCON = ( 9 <<24)
    537. 

  537. #define CH3_FUNO_PB5MAP            FUNCOUTMCON = (10 <<24)
    538. 

  538. 

  539. #define CH3_FUNO_PE0MAP            FUNCOUTMCON = (11 <<24)
    540. 

  540. #define CH3_FUNO_PE4MAP            FUNCOUTMCON = (12 <<24)
    541. 

  541. #define CH3_FUNO_PE5MAP            FUNCOUTMCON = (13 <<24)
    542. 

  542. #define CH3_FUNO_PE6MAP            FUNCOUTMCON = (14 <<24)
    543. 

  543. #define CH3_FUNO_PE7MAP            FUNCOUTMCON = (15 <<24)
    544. 

  544. 

  545. #define CH3_FUNO_PF0MAP            FUNCOUTMCON = (16 <<24)
    546. 

  546. #define CH3_FUNO_PF1MAP            FUNCOUTMCON = (17 <<24)
    547. 

  547. 

  548. //channel input function select
    549. 

  549. #define CH0_FUNI_SEL(ch0_funi_sel) FUNCINCON  = (ch0_funi_sel << 0)
    550. 

  550. #define CH1_FUNI_SEL(ch1_funi_sel) FUNCINCON  = (ch1_funi_sel << 8)
    551. 

  551. #define CH2_FUNI_SEL(ch2_funi_sel) FUNCINCON  = (ch2_funi_sel <<16)
    552. 

  552. #define CH3_FUNI_SEL(ch3_funi_sel) FUNCINCON  = (ch3_funi_sel <<24)
    553. 

  553. 

  554. #endif
    555.